公开(公告)号：US09497464B2

公开(公告)日：2016-11-15

申请号：US13827210

申请日：2013-03-14

Applicant: STMICROELECTRONICS INTERNATIONAL N.V. ,  STMICROELECTRONICS S.R.L.

Inventor： Subarna Tripathi ,  Emiliano Piccinelli

IPC: H04N7/12 ,  H04N19/107 ,  H04N19/149 ,  H04N19/124 ,  H04N19/152 ,  H04N19/162 ,  H04N19/177 ,  H04N19/40 ,  H04N19/105 ,  H04N19/146 ,  H04N19/169

CPC classification number: H04N19/107 ,  H04N19/105 ,  H04N19/124 ,  H04N19/146 ,  H04N19/149 ,  H04N19/152 ,  H04N19/162 ,  H04N19/169 ,  H04N19/177 ,  H04N19/40

Abstract: A GOP-independent dynamic bit-rate controller system includes a user interface to receive one or more input parameters, a bit-rate controller and an encoder. The bit-rate controller regulates a bit-rate of an output bit-stream. The bit-rate controller includes multiple bit-rate modules to determine a bit-estimate and a quantization parameter, and a control module to calculate a convergence period based on the received input parameters and a frame rate. The control module selects a bit rate module based on the convergence period and the encoder generates the output bit-stream using the quantization parameter determined by the bit rate module.

Abstract translation: 独立于GOP的动态比特率控制器系统包括用于接收一个或多个输入参数的用户界面，比特率控制器和编码器。 比特率控制器调节输出比特流的比特率。 比特率控制器包括用于确定比特估计和量化参数的多个比特率模块，以及基于所接收的输入参数和帧速率来计算收敛周期的控制模块。 控制模块基于收敛周期选择比特率模块，并且编码器使用由比特率模块确定的量化参数来生成输出比特流。

公开(公告)号：US09245200B2

公开(公告)日：2016-01-26

申请号：US14068437

申请日：2013-10-31

Applicant: STMICROELECTRONICS S.R.L. ,  STMICROELECTRONICS INTERNATIONAL N.V.

Inventor： Luca Magri ,  Beatrice Rossi ,  Subarna Tripathi ,  Pasqualina Fragneto ,  Emiliano Mario Piccinelli

IPC: G06K9/46 ,  G06T7/00

CPC classification number: G06K9/4604 ,  G06T7/13 ,  G06T2207/20061

Abstract: An embodiment is a computer-implemented method for detecting a straight line in a digital image comprising a plurality of pixels comprising the steps: detecting an edge in the digital image, generating a first straight line which passes through a first pixel of the detected edge, generating a second straight line which passes through a second pixel of the detected edge, which is different from the first pixel, determining at least two intersections with a boundary of the digital image for each generated straight line, determining a set of two parameter values for each generated straight line based on the respective determined at least two intersections, wherein the set of two parameter values uniquely determines the respective generated straight line, and detecting the straight line in the digital image based on the determined sets of two parameter values.

Abstract translation: 一个实施例是用于检测包括多个像素的数字图像中的直线的计算机实现的方法，包括以下步骤：检测数字图像中的边缘，生成穿过检测到的边缘的第一像素的第一直线， 产生穿过所检测的边缘的不同于第一像素的第二像素的第二直线，为每个生成的直线确定与数字图像的边界的至少两个交点，确定一组两个参数值，以供 每个生成的直线基于相应确定的至少两个交点，其中所述两个参数值的集合唯一地确定相应生成的直线，并且基于所确定的两个参数值的集合来检测数字图像中的直线。

公开(公告)号：US09813731B2

公开(公告)日：2017-11-07

申请号：US14453006

申请日：2014-08-06

Applicant: STMicroelectronics International N.V.

Inventor： Santanu Chaudhury ,  Mona Mathur ,  Aditya Khandelia ,  Subarna Tripathi ,  Brejesh Lall ,  Sumantra Dutta Roy ,  Saurabh Gorecha

IPC: H04N7/12 ,  H04N19/587 ,  H04N19/139 ,  H04N19/159 ,  H04N19/61 ,  H04N19/12 ,  H04N19/132 ,  H04N19/14 ,  H04N19/17 ,  H04N19/20 ,  H04N19/436 ,  H04N19/23 ,  H04N19/543 ,  G06T7/215

CPC classification number: H04N19/587 ,  G06T7/215 ,  G06T2207/10016 ,  H04N19/12 ,  H04N19/132 ,  H04N19/139 ,  H04N19/14 ,  H04N19/159 ,  H04N19/17 ,  H04N19/20 ,  H04N19/23 ,  H04N19/436 ,  H04N19/543 ,  H04N19/61

Abstract: A video compression framework based on parametric object and background compression is proposed. At the encoder, an embodiment detects objects and segments frames into regions corresponding to the foreground object and the background. The object and the background are individually encoded using separate parametric coding techniques. While the object is encoded using the projection of coefficients to the orthonormal basis of the learnt subspace (used for appearance based object tracking), the background is characterized using an auto-regressive (AR) process model. An advantage of the proposed schemes is that the decoder structure allows for simultaneous reconstruction of object and background, thus making it amenable to the new multi-thread/multi-processor architectures.