公开(公告)号：US20240242749A1

公开(公告)日：2024-07-18

申请号：US18410049

申请日：2024-01-11

Applicant: STMicroelectronics International N.V.

Inventor： Riccardo CONDORELLI ,  Antonino MONDELLO ,  Michele Alessandro CARRANO ,  Michele BOTTARO ,  Salvatore COSTA ,  Jacques TALAYSSAT

IPC: G11C7/24 ,  G11C7/20

CPC classification number: G11C7/24 ,  G11C7/20

Abstract: A reset pad circuit has first and second inputs coupled, respectively, to a first reset access port receiving a first reset request and a second reset access port. The reset pad circuit generates a first reset state signal. An internal reset activation gate has inputs coupled to internal resources and an output that applies a reset request to the second reset access port. A memory element has first and second inputs coupled, respectively, to the output of the reset activation gate and the output of the reset pad circuit. The memory element generates a second reset state signal when receiving the reset request until receiving the first reset state signal. A reset forward gate coupled to outputs of the reset pad circuit and the memory element generates a system reset request in response to the first reset state signal or the second state signal.