公开(公告)号：US20240215233A1

公开(公告)日：2024-06-27

申请号：US18540482

申请日：2023-12-14

Applicant: STMicroelectronics International N.V.

Inventor： Brice ARRAZAT ,  Christian RIVERO ,  Julien DELALLEAU ,  Joel METZ

IPC: H10B41/35 ,  H01L21/762 ,  H10B41/10

CPC classification number: H10B41/35 ,  H01L21/76224 ,  H10B41/10

Abstract: An electronic circuit includes a transistor cell with multiple transistors arranged inside and on top of a semiconductor substrate. Each transistor has an active area. First insulating regions are at least partially located around the transistors and extend down to a first depth in the semiconductor substrate. Second insulating regions are positioned to insulate the active areas the transistors from one another. The second insulating regions extend down to a second depth in the semiconductor substrate, the second depth being greater than the first depth.