公开(公告)号：US20240288478A1

公开(公告)日：2024-08-29

申请号：US18436644

申请日：2024-02-08

Applicant: STMicroelectronics International N.V.

Inventor： Antonio Barcella ,  Mario Rotigni ,  Nicolas Bernard Grossier

IPC: G01R23/00 ,  G01S19/13 ,  H03K5/26 ,  H03K19/20

CPC classification number: G01R23/005 ,  G01S19/13 ,  H03K5/26 ,  H03K19/20

Abstract: A method comprises receiving an input clock signal having a clock frequency band between a lower frequency limit value and an upper frequency limit value, dividing the clock frequency band in a set of frequency ranges having a set of frequency limit values that include the lower frequency limit value and the upper frequency limit value, comparing the frequency of the clock signal with the set of frequency limit values to produce comparison indicators having a first logic value when the measured frequency fails to exceed at least one frequency limit value and having a second logic value when the measured frequency exceeds the at least one frequency limit value, and, as a result of at least one of the logic values of comparison indicators having the second logic value, producing a global flag signal indicating that the measured frequency falls outside of a frequency range.