METHOD OF MONITORING A CLOCK SIGNAL, CORRESPONDING DEVICE AND SYSTEM

    公开(公告)号:US20240288478A1

    公开(公告)日:2024-08-29

    申请号:US18436644

    申请日:2024-02-08

    CPC classification number: G01R23/005 G01S19/13 H03K5/26 H03K19/20

    Abstract: A method comprises receiving an input clock signal having a clock frequency band between a lower frequency limit value and an upper frequency limit value, dividing the clock frequency band in a set of frequency ranges having a set of frequency limit values that include the lower frequency limit value and the upper frequency limit value, comparing the frequency of the clock signal with the set of frequency limit values to produce comparison indicators having a first logic value when the measured frequency fails to exceed at least one frequency limit value and having a second logic value when the measured frequency exceeds the at least one frequency limit value, and, as a result of at least one of the logic values of comparison indicators having the second logic value, producing a global flag signal indicating that the measured frequency falls outside of a frequency range.

    POWER SUPPLY ABNORMALITY DETECTION CIRCUIT
    3.
    发明公开

    公开(公告)号:US20240142545A1

    公开(公告)日:2024-05-02

    申请号:US18489848

    申请日:2023-10-19

    Inventor: Takahiro YONEDA

    CPC classification number: G01R31/40 G01R23/005

    Abstract: Provided is a power supply abnormality detection circuit capable of detecting a power supply abnormality using a logic circuit.
    The power supply abnormality detection circuit includes a preset first dividing circuit part dividing a frequency of an input clock signal by a frequency of a first ratio and output the divided frequency, a second dividing circuit part dividing a frequency of the input clock signal by the frequency of the first ratio when a power supply voltage is a normal voltage, and dividing a frequency of an input signal by a frequency of a second ratio different from the first ratio and outputting the divided frequency when the power supply voltage is an abnormal voltage, and a comparison circuit part performing comparison of two signals of an output signal of the first dividing circuit part and an output signal of the second dividing circuit part.

    BATTERY TYPE DETERMINATION SYSTEM, METHOD FOR DETERMINING BATTERY TYPE, AND STORAGE MEDIUM

    公开(公告)号:US20230318313A1

    公开(公告)日:2023-10-05

    申请号:US18109894

    申请日:2023-02-15

    Inventor: Yasumichi Onuki

    CPC classification number: H02J7/00045 G01R23/005 G01R31/389 H01M10/4285

    Abstract: A battery type determination system includes an electric circuit connected to a battery, and a battery type determination device that determines a type of the battery on the basis of a characteristic value of the electric circuit. The electric circuit includes an AC power supply having a variable frequency, and a capacitor circuit. The battery type determination device includes a resonance state detection unit that detects at least one resonance state in response to an AC signal output from the AC power supply, a resonance frequency detection unit that detects a resonance frequency in the resonance state, a resonance characteristic detection unit that uses the resonance frequency as a resonance characteristic of the battery, and a determination unit that determines whether or not the battery is of the same type as a reference battery by comparing the resonance characteristic of the battery with a reference resonance characteristic of the reference battery serving as a reference for the battery.

    RF PHASE OFFSET DETECTION CIRCUIT
    6.
    发明申请

    公开(公告)号:US20170279439A1

    公开(公告)日:2017-09-28

    申请号:US15431933

    申请日:2017-02-14

    Applicant: Qorvo US, Inc.

    Abstract: An RF phase offset detection system, which includes a first RF phase detector and a second RF phase detector, and measures a first phase offset between a first RF signal and a second RF signal, is disclosed. Each of the first RF signal and the second RF signal has a common RF frequency. The first RF phase detector detects and filters the first RF signal and the second RF signal to provide a first detection signal. The second RF phase detector receives and phase-shifts the second RF signal to provide a phase-shifted RF signal. The second RF phase detector further detects and filters the first RF signal and the phase-shifted RF signal to provide a second detection signal, such that a combination of the first detection signal and the second detection signal is representative of the first phase offset.

    WIRELESS POWER TRANSFER METHOD AND APPARATUS AND METHOD OF DETECTING RESONANT FREQUENCY USED IN WIRELESS POWER TRANSFER
    8.
    发明申请
    WIRELESS POWER TRANSFER METHOD AND APPARATUS AND METHOD OF DETECTING RESONANT FREQUENCY USED IN WIRELESS POWER TRANSFER 审中-公开
    无线电力传输的无线电力传输方法及装置及其检测方法

    公开(公告)号:US20160164303A1

    公开(公告)日:2016-06-09

    申请号:US14942367

    申请日:2015-11-16

    CPC classification number: G01R23/005 H02J7/025 H02J50/12 H02J50/40 H02J50/80

    Abstract: Disclosed herein are a wireless power transfer apparatus, a method for wireless power transfer and a method of detecting a resonant frequency used in a wireless power charging system or a wireless power transfer. The wireless power transfer apparatus includes a plurality of transmission coils, each of which transmits power to a receiver coil through magnetic resonance; a signal generator transmitting signals having different resonant frequencies to the plurality of transmission coils, the signal generator being connected to the plurality of transmission coils; and a feedback unit transferring information on amounts of powers which are respectively output by the plurality of transmission coils to the signal generator.

    Abstract translation: 本文公开了一种无线电力传送装置,无线电力传送方法和检测在无线电力充电系统或无线电力传输中使用的谐振频率的方法。 无线电力传送装置包括多个发送线圈,每个发送线圈通过磁共振向接收器线圈发送电力; 信号发生器将具有不同谐振频率的信号发送到所述多个发送线圈,所述信号发生器连接到所述多个发送线圈; 以及反馈单元,其将由多个发送线圈分别输出的功率量的信息传送到信号发生器。

    Programmable sensitivity frequency coincidence detection circuit and method
    9.
    发明授权
    Programmable sensitivity frequency coincidence detection circuit and method 失效
    可编程灵敏度频率一致检测电路及方法

    公开(公告)号:US07532040B1

    公开(公告)日:2009-05-12

    申请号:US11928080

    申请日:2007-10-30

    CPC classification number: G01R23/005 H03D13/001

    Abstract: A frequency coincidence detection circuit for detecting frequency edges for each of a plurality of periodic digital signals. The circuit generates count indicators for each of the periodic digital signals and compares each of the count indicators to a programmable sensitivity input to determine a coincidence window for the corresponding one of each of the periodic digital signals. The circuit determines a signal coincidence of the coincidence windows. In another embodiment, a frequency coincidence detection method is provided. The method detects frequency edges for each of a plurality of periodic digital signals, generates count indicators for each of the periodic digital signals and compares each of the count indicators to a programmable sensitivity input to determine a coincidence window for the corresponding one of each of the periodic digital signals. The method determines a signal coincidence of the coincidence windows.

    Abstract translation: 一种用于检测多个周期数字信号中的每一个的频率边缘的频率一致检测电路。 电路产生每个周期性数字信号的计数指示器,并将每个计数指示器与可编程灵敏度输入进行比较,以确定每个周期性数字信号中的相应一个的一致窗口。 电路确定符合窗口的信号重合。 在另一个实施例中,提供了一种频率一致检测方法。 该方法检测多个周期性数字信号中的每一个的频率边缘,为每个周期性数字信号产生计数指示符,并将每个计数指示符与可编程灵敏度输入进行比较,以确定每个周期数字信号中的每一个的相应窗口 周期性数字信号。 该方法确定符合窗口的信号重合。

    Frequency detection circuit and data processing apparatus
    10.
    发明授权
    Frequency detection circuit and data processing apparatus 失效
    频率检测电路和数据处理装置

    公开(公告)号:US07134042B2

    公开(公告)日:2006-11-07

    申请号:US10744788

    申请日:2003-12-22

    Inventor: Shinya Shimasaki

    CPC classification number: G01R23/005 G01R23/15

    Abstract: A frequency detection circuit according to the present invention has a status holding register for storing rise information and fall information about a check target clock and outputting an error detection signal showing frequency abnormality when information showing the next edge (a fall or a rise) from a rise or a fall of the check target clock is not stored, a rise/fall detection circuit for respectively detecting a rise and a fall of the check target clock and outputting a rise detection signal in response to the rise and a fall detection signal in response to the fall, a sampling clock generation circuit for generating sampling clock for storing the information about the check target clock, and an edge detection signal generation circuit for outputting an edge detection signal which is an edge detection result of the check target clock based on the rise detection signal and the fall detection signal.

    Abstract translation: 根据本发明的频率检测电路具有用于存储关于检查目标时钟的上升信息和下降信息的状态保持寄存器,并且当从信号显示下一个边缘(下降或上升)的信息时,输出表示频率异常的错误检测信号 不存储检查目标时钟的上升或下降的上升/下降检测电路,用于分别检测检查目标时钟的上升和下降并响应于响应于上升和下降检测信号而输出上升检测信号的上升/下降检测电路 一个采样时钟产生电路,用于产生用于存储关于检查目标时钟的信息的采样时钟;以及边沿检测信号产生电路,用于输出作为检查目标时钟的边缘检测结果的边沿检测信号,该边沿检测信号基于 上升检测信号和下降检测信号。

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