Abstract:
A method comprises receiving an input clock signal having a clock frequency band between a lower frequency limit value and an upper frequency limit value, dividing the clock frequency band in a set of frequency ranges having a set of frequency limit values that include the lower frequency limit value and the upper frequency limit value, comparing the frequency of the clock signal with the set of frequency limit values to produce comparison indicators having a first logic value when the measured frequency fails to exceed at least one frequency limit value and having a second logic value when the measured frequency exceeds the at least one frequency limit value, and, as a result of at least one of the logic values of comparison indicators having the second logic value, producing a global flag signal indicating that the measured frequency falls outside of a frequency range.
Abstract:
Described implementations monitor potential voltage at a location to determine device usage at the location. The implementations utilize a plug-in energy sensor that is plugged directly into any electrical outlet at the location and measures deviation in voltage at the location. Once plugged into an electrical outlet, the plug-in energy sensor monitors one or more of the positive line and ground and/or the neutral line and ground for changes in potential voltage at the location. The plug-in energy sensor may also inject a load (resistive load, inductive load, capacitive load) into the electrical circuit at the location and then measure the signal or response to the injected load.
Abstract:
Provided is a power supply abnormality detection circuit capable of detecting a power supply abnormality using a logic circuit. The power supply abnormality detection circuit includes a preset first dividing circuit part dividing a frequency of an input clock signal by a frequency of a first ratio and output the divided frequency, a second dividing circuit part dividing a frequency of the input clock signal by the frequency of the first ratio when a power supply voltage is a normal voltage, and dividing a frequency of an input signal by a frequency of a second ratio different from the first ratio and outputting the divided frequency when the power supply voltage is an abnormal voltage, and a comparison circuit part performing comparison of two signals of an output signal of the first dividing circuit part and an output signal of the second dividing circuit part.
Abstract:
A battery type determination system includes an electric circuit connected to a battery, and a battery type determination device that determines a type of the battery on the basis of a characteristic value of the electric circuit. The electric circuit includes an AC power supply having a variable frequency, and a capacitor circuit. The battery type determination device includes a resonance state detection unit that detects at least one resonance state in response to an AC signal output from the AC power supply, a resonance frequency detection unit that detects a resonance frequency in the resonance state, a resonance characteristic detection unit that uses the resonance frequency as a resonance characteristic of the battery, and a determination unit that determines whether or not the battery is of the same type as a reference battery by comparing the resonance characteristic of the battery with a reference resonance characteristic of the reference battery serving as a reference for the battery.
Abstract:
A C/N ratio detection circuit includes a voltage detector, an averaging section, a time variation range calculator, and a C/N ratio calculator. The voltage detector measures an input voltage of a signal. The averaging section calculates an average of the input voltage over a predetermined time. The time variation range calculator calculates a time variation range of the input voltage over the predetermined time. The C/N ratio calculator calculates a C/N ratio of the signal by using the average and time variation range of the input voltage.
Abstract:
An RF phase offset detection system, which includes a first RF phase detector and a second RF phase detector, and measures a first phase offset between a first RF signal and a second RF signal, is disclosed. Each of the first RF signal and the second RF signal has a common RF frequency. The first RF phase detector detects and filters the first RF signal and the second RF signal to provide a first detection signal. The second RF phase detector receives and phase-shifts the second RF signal to provide a phase-shifted RF signal. The second RF phase detector further detects and filters the first RF signal and the phase-shifted RF signal to provide a second detection signal, such that a combination of the first detection signal and the second detection signal is representative of the first phase offset.
Abstract:
A detection device includes: a frequency property acquisition unit that acquires a frequency property when an alternating-current signal is input to at least two conductive bodies provided on a fiber sheet; and a detection signal output unit that outputs a detection signal when the frequency property acquisition unit acquires a predetermined frequency property.
Abstract:
Disclosed herein are a wireless power transfer apparatus, a method for wireless power transfer and a method of detecting a resonant frequency used in a wireless power charging system or a wireless power transfer. The wireless power transfer apparatus includes a plurality of transmission coils, each of which transmits power to a receiver coil through magnetic resonance; a signal generator transmitting signals having different resonant frequencies to the plurality of transmission coils, the signal generator being connected to the plurality of transmission coils; and a feedback unit transferring information on amounts of powers which are respectively output by the plurality of transmission coils to the signal generator.
Abstract:
A frequency coincidence detection circuit for detecting frequency edges for each of a plurality of periodic digital signals. The circuit generates count indicators for each of the periodic digital signals and compares each of the count indicators to a programmable sensitivity input to determine a coincidence window for the corresponding one of each of the periodic digital signals. The circuit determines a signal coincidence of the coincidence windows. In another embodiment, a frequency coincidence detection method is provided. The method detects frequency edges for each of a plurality of periodic digital signals, generates count indicators for each of the periodic digital signals and compares each of the count indicators to a programmable sensitivity input to determine a coincidence window for the corresponding one of each of the periodic digital signals. The method determines a signal coincidence of the coincidence windows.
Abstract:
A frequency detection circuit according to the present invention has a status holding register for storing rise information and fall information about a check target clock and outputting an error detection signal showing frequency abnormality when information showing the next edge (a fall or a rise) from a rise or a fall of the check target clock is not stored, a rise/fall detection circuit for respectively detecting a rise and a fall of the check target clock and outputting a rise detection signal in response to the rise and a fall detection signal in response to the fall, a sampling clock generation circuit for generating sampling clock for storing the information about the check target clock, and an edge detection signal generation circuit for outputting an edge detection signal which is an edge detection result of the check target clock based on the rise detection signal and the fall detection signal.