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公开(公告)号：US11444580B2
公开(公告)日：2022-09-13
申请号：US16837783
申请日：2020-04-01
Applicant: STMicroelectronics International N.V.
Inventor： Riju Biswas
Abstract: An offset-cancellation circuit having a first amplification stage with a gain of the first amplification stage and configured to receive an offset voltage of a first amplifier. A storage element is configured to be coupled to and decoupled from the first amplification stage and configured to store a potential difference output by the first amplification stage. The potential difference is determined by the offset voltage of the first amplifier and the gain of the first amplification stage. A second amplification stage is coupled to the storage element and configured to receive the potential difference from the storage element when the storage element is decoupled from the first amplification stage and configured to deliver an offset-cancellation current. The offset-cancellation current is determined by the potential difference and a gain of the second amplification stage.
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公开(公告)号：US20220407481A1
公开(公告)日：2022-12-22
申请号：US17891860
申请日：2022-08-19
Applicant: STMicroelectronics International N.V.
Inventor： Riju Biswas
Abstract: An offset-cancellation circuit having a first amplification stage with a gain of the first amplification stage and configured to receive an offset voltage of a first amplifier. A storage element is configured to be coupled to and decoupled from the first amplification stage and configured to store a potential difference output by the first amplification stage. The potential difference is determined by the offset voltage of the first amplifier and the gain of the first amplification stage. A second amplification stage is coupled to the storage element and configured to receive the potential difference from the storage element when the storage element is decoupled from the first amplification stage and configured to deliver an offset-cancellation current. The offset-cancellation current is determined by the potential difference and a gain of the second amplification stage.
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公开(公告)号：US20210313933A1
公开(公告)日：2021-10-07
申请号：US16837783
申请日：2020-04-01
Applicant: STMicroelectronics International N.V.
Inventor： Riju Biswas
Abstract: An offset-cancellation circuit having a first amplification stage with a gain of the first amplification stage and configured to receive an offset voltage of a first amplifier. A storage element is configured to be coupled to and decoupled from the first amplification stage and configured to store a potential difference output by the first amplification stage. The potential difference is determined by the offset voltage of the first amplifier and the gain of the first amplification stage. A second amplification stage is coupled to the storage element and configured to receive the potential difference from the storage element when the storage element is decoupled from the first amplification stage and configured to deliver an offset-cancellation current. The offset-cancellation current is determined by the potential difference and a gain of the second amplification stage.
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公开(公告)号：US12261578B2
公开(公告)日：2025-03-25
申请号：US17891860
申请日：2022-08-19
Applicant: STMicroelectronics International N.V.
Inventor： Riju Biswas
Abstract: An offset-cancellation circuit having a first amplification stage with a gain of the first amplification stage and configured to receive an offset voltage of a first amplifier. A storage element is configured to be coupled to and decoupled from the first amplification stage and configured to store a potential difference output by the first amplification stage. The potential difference is determined by the offset voltage of the first amplifier and the gain of the first amplification stage. A second amplification stage is coupled to the storage element and configured to receive the potential difference from the storage element when the storage element is decoupled from the first amplification stage and configured to deliver an offset-cancellation current. The offset-cancellation current is determined by the potential difference and a gain of the second amplification stage.
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Patent Agency Ranking
公开(公告)号：US11658624B2
公开(公告)日：2023-05-23
申请号：US17461123
申请日：2021-08-30
Applicant: STMicroelectronics International N.V.
Inventor： Riju Biswas , Ratul Mitra
IPC: H03F3/45
CPC classification number: H03F3/45085 , H03F3/45475 , H03F2203/45006 , H03F2203/45026 , H03F2203/45048 , H03F2203/45084 , H03F2203/45088 , H03F2203/45211
Abstract: Disclosed herein is a method including sinking current from a pair of input transistors of a differential amplifier while sourcing more current to the pair of input transistors than is sunk. The method further includes generating a pair of input differential signals using a pair of input voltage regulators, and amplifying a difference between the pair of input differential signals to produce a pair of differential output voltages, using the differential amplifier. The method also includes amplifying the pair of differential output voltages using at least one voltage gain amplifier, and generating control signals for current sources that source the current to the pair of input transistors of the differential amplifier, from the pair of differential output voltages after at least amplification.
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公开(公告)号：US11502659B2
公开(公告)日：2022-11-15
申请号：US16903552
申请日：2020-06-17
Applicant: STMicroelectronics International N.V.
Inventor： Riju Biswas
IPC: H03G3/30 , G01S13/931 , H03F3/45
Abstract: Disclosed herein is a voltage gain amplifier for use in an automotive radar receiver chain. The voltage gain amplifier utilizes pole-zero cancelation to yield a desired transfer function without gain peaking at a bandwidth in which attenuation is desired, and utilizes a low pass filter effectively formed by a feedback loop including a high pass filter and a differential amplifier to ensure the desired level of attenuation at the desired bandwidth. In some instances, a chopper may be utilized in the feedback loop prior to the high pass filter, and after the differential amplifier, so as to reduce the bandwidth of the differential amplifier in the feedback loop.
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公开(公告)号：US11381207B2
公开(公告)日：2022-07-05
申请号：US16838315
申请日：2020-04-02
Applicant: STMicroelectronics International N.V.
Inventor： Riju Biswas
Abstract: An apparatus includes a load pair including a first transistor and a second transistor, a common mode feedback circuit comprising a first common mode feedback transistor and a second common mode feedback transistor, wherein a drain of the first common mode feedback transistor is coupled to a source of the first transistor, and a gate of the first common mode feedback transistor is coupled to a drain of the first transistor, and a drain of the second common mode feedback transistor is coupled to a source of the second transistor, and a gate of the second common mode feedback transistor is coupled to a drain of the second transistor, and an offset cancellation stage coupled to outputs of the load pair.
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公开(公告)号：US20210313941A1
公开(公告)日：2021-10-07
申请号：US16838315
申请日：2020-04-02
Applicant: STMicroelectronics International N.V.
Inventor： Riju Biswas
Abstract: An apparatus includes a load pair including a first transistor and a second transistor, a common mode feedback circuit comprising a first common mode feedback transistor and a second common mode feedback transistor, wherein a drain of the first common mode feedback transistor is coupled to a source of the first transistor, and a gate of the first common mode feedback transistor is coupled to a drain of the first transistor, and a drain of the second common mode feedback transistor is coupled to a source of the second transistor, and a gate of the second common mode feedback transistor is coupled to a drain of the second transistor, and an offset cancellation stage coupled to outputs of the load pair.
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公开(公告)号：US11121687B1
公开(公告)日：2021-09-14
申请号：US16861602
申请日：2020-04-29
Applicant: STMicroelectronics International N.V.
Inventor： Riju Biswas , Ratul Mitra
IPC: H03F3/45
Abstract: Disclosed herein is a circuit including a differential amplifier having a pair of input transistors coupled in a differential arrangement between adjustable current sources and receiving input differential signals from a pair of input voltage regulators. The adjustable current sources are configured to source more current to the pair of input transistors than current that is sunk from the pair of input transistors. A first amplifier has inputs coupled to receive differential output voltages from the differential amplifier. A second amplifier has inputs coupled to receive amplified differential output voltages from the first amplifier. A low pass filter has inputs coupled to receive further amplified differential output voltages from the second amplifier and produce final differential output voltages.
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