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1.发明申请SCHEME TO MEASURE INDIVIDUALLY RISE AND FALL DELAYS OF NON-INVERTING LOGIC CELLS 有权测量非反转逻辑电池的个性化升级和延迟的方案公开(公告)号：US20160061894A1
公开(公告)日：2016-03-03
申请号：US14472220
申请日：2014-08-28
Applicant: STMicroelectronics International N.V.
Inventor： Saurabh Kumar Singh , Balwant Singh
IPC: G01R31/317 , G01R31/3177
CPC classification number: G01R31/31725
Abstract: A test circuit measures both the rising edge delay and the falling edge delay associated with a logic cell. The test circuit includes a flip-flop type ring oscillator with two groups of logic cells connected in series in the oscillation path. A first multiplexor switches the ring oscillator between a rising edge and a falling edge mode. A second multiplexer causes the second group of logic cells to be included or excluded from the oscillation path. By measuring the oscillation period in the various modes, the rising edge and falling edge delays can be individually calculated.
Abstract translation: 测试电路测量与逻辑单元相关联的上升沿延迟和下降沿延迟。 测试电路包括具有在振荡路径中串联连接的两组逻辑单元的触发器型环形振荡器。 第一个多路复用器在上升沿和下降沿模式之间切换环形振荡器。 第二多路复用器使第二组逻辑单元从振荡路径中包含或排除。 通过测量各种模式下的振荡周期，可以单独计算上升沿和下降沿延迟。
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公开(公告)号：US09804225B2
公开(公告)日：2017-10-31
申请号：US14472220
申请日：2014-08-28
Applicant: STMicroelectronics International N.V.
Inventor： Saurabh Kumar Singh , Balwant Singh
IPC: G01R31/28 , G01R31/317
CPC classification number: G01R31/31725
Abstract: A test circuit measures both the rising edge delay and the falling edge delay associated with a logic cell. The test circuit includes a flip-flop type ring oscillator with two groups of logic cells connected in series in the oscillation path. A first multiplexor switches the ring oscillator between a rising edge and a falling edge mode. A second multiplexer causes the second group of logic cells to be included or excluded from the oscillation path. By measuring the oscillation period in the various modes, the rising edge and falling edge delays can be individually calculated.
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3.发明授权公开(公告)号：US09342085B2
公开(公告)日：2016-05-17
申请号：US14512564
申请日：2014-10-13
Applicant: STMicroelectronics International N.V.
Inventor： Hemant Shukla , Saurabh Kumar Singh , Nitin Bansal
Abstract: An electronic device includes a power supply, a ground, and an intermediate ground having a voltage less than a voltage of the power supply and greater than a voltage of the ground. The electronic device also includes an error amplifier having an input stage coupled between the power supply and the ground, and an output stage coupled between the power supply and the intermediate ground. A ballast transistor is coupled to receive an output from the error amplifier. A feedback circuit is coupled to an output of the ballast transistor to generate feedback signals, and the error amplifier operates in response to the feedback signals.
Abstract translation: 电子设备包括电源，接地和具有小于电源电压的电压并且大于地的电压的中间接地。 电子设备还包括误差放大器，其具有耦合在电源和地之间的输入级，以及耦合在电源和中间接地之间的输出级。 耦合镇流器晶体管以接收来自误差放大器的输出。 反馈电路耦合到镇流器晶体管的输出以产生反馈信号，误差放大器响应于反馈信号而工作。
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4.发明申请公开(公告)号：US20160103458A1
公开(公告)日：2016-04-14
申请号：US14512564
申请日：2014-10-13
Applicant: STMicroelectronics International N.V.
Inventor： Hemant Shukla , Saurabh Kumar Singh , Nitin Bansal
Abstract: An electronic device includes a power supply, a ground, and an intermediate ground having a voltage less than a voltage of the power supply and greater than a voltage of the ground. The electronic device also includes an error amplifier having an input stage coupled between the power supply and the ground, and an output stage coupled between the power supply and the intermediate ground. A ballast transistor is coupled to receive an output from the error amplifier. A feedback circuit is coupled to an output of the ballast transistor to generate feedback signals, and the error amplifier operates in response to the feedback signals.
Abstract translation: 电子设备包括电源，接地和具有小于电源电压的电压并且大于地的电压的中间接地。 电子设备还包括误差放大器，其具有耦合在电源和地之间的输入级，以及耦合在电源和中间接地之间的输出级。 耦合镇流器晶体管以接收来自误差放大器的输出。 反馈电路耦合到镇流器晶体管的输出以产生反馈信号，误差放大器响应于反馈信号而工作。
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公开(公告)号：US09651958B2
公开(公告)日：2017-05-16
申请号：US15131913
申请日：2016-04-18
Applicant: STMicroelectronics International N.V.
Inventor： Nitin Bansal , Saurabh Kumar Singh , Hemant Shukla
Abstract: An electronic device includes a power supply, a ground, and an intermediate ground having a voltage less than a voltage of the power supply and greater than a voltage of the ground. The electronic device also includes an error amplifier having an input stage coupled between the power supply and the ground, and an output stage coupled between the power supply and the intermediate ground. A ballast transistor is coupled to receive an output from the error amplifier. A feedback circuit is coupled to an output of the ballast transistor to generate feedback signals, and the error amplifier operates in response to the feedback signals.
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Patent Agency Ranking
公开(公告)号：US09395730B2
公开(公告)日：2016-07-19
申请号：US13929549
申请日：2013-06-27
Applicant: STMicroelectronics International N.V.
Inventor： Saurabh Kumar Singh , Nitin Bansal , Kallol Chatterjee
Abstract: A method and apparatus are provided. The apparatus includes a plurality of devices forming a positive feedback loop for driving a regulated output voltage towards a reference voltage. Device ratios of at least two of the plurality of devices are set such that the positive feedback loop is stable.
Abstract translation: 提供了一种方法和装置。 该装置包括多个装置，其形成用于将调节的输出电压朝向参考电压驱动的正反馈回路。 设置多个装置中的至少两个装置的装置比，使得正反馈环路是稳定的。
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公开(公告)号：US20150002110A1
公开(公告)日：2015-01-01
申请号：US13929549
申请日：2013-06-27
Applicant: STMicroelectronics International N.V.
Inventor： Saurabh Kumar Singh , Nitin Bansal , Kallol Chatterjee
IPC: G05F1/10
Abstract: A method and apparatus are provided. The apparatus comprises a plurality of devices forming a positive feedback loop for driving a regulated output voltage towards a reference voltage. Device ratios of at least two of the plurality of devices are set such that the positive feedback loop is stable.
Abstract translation: 提供了一种方法和装置。 该装置包括形成正反馈回路的多个装置，用于将调节的输出电压驱向参考电压。 设置多个装置中的至少两个装置的装置比，使得正反馈环路是稳定的。
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公开(公告)号：US10386412B2
公开(公告)日：2019-08-20
申请号：US15678016
申请日：2017-08-15
Applicant: STMICROELECTRONICS INTERNATIONAL N.V.
Inventor： Saurabh Kumar Singh , Balwant Singh
IPC: G01R31/317
Abstract: A test circuit measures both the rising edge delay and the falling edge delay associated with a logic cell. The test circuit includes a flip-flop type ring oscillator with two groups of logic cells connected in series in the oscillation path. A first multiplexor switches the ring oscillator between a rising edge and a falling edge mode. A second multiplexer causes the second group of logic cells to be included or excluded from the oscillation path. By measuring the oscillation period in the various modes, the rising edge and falling edge delays can be individually calculated.
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公开(公告)号：US20160231758A1
公开(公告)日：2016-08-11
申请号：US15131913
申请日：2016-04-18
Applicant: STMicroelectronics International N.V.
Inventor： Nitin Bansal , Saurabh Kumar Singh , Hemant Shukla
Abstract: An electronic device includes a power supply, a ground, and an intermediate ground having a voltage less than a voltage of the power supply and greater than a voltage of the ground. The electronic device also includes an error amplifier having an input stage coupled between the power supply and the ground, and an output stage coupled between the power supply and the intermediate ground. A ballast transistor is coupled to receive an output from the error amplifier. A feedback circuit is coupled to an output of the ballast transistor to generate feedback signals, and the error amplifier operates in response to the feedback signals.
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公开(公告)号：US09229462B2
公开(公告)日：2016-01-05
申请号：US14788682
申请日：2015-06-30
Applicant: STMicroelectronics International N.V.
Inventor： Hemant Shukla , Saurabh Kumar Singh , Nitin Bansal
Abstract: An FDSOI integrated circuit die supplies on an output node a regulated output voltage based on a reference voltage. A pass transistor that passes a first current to the output node. A feedback loop regulates the output voltage by generating a second current based on the first current and applying a control signal to the pass transistor based on the second current. A loop current adaptor adapts a ratio of the first and second currents by adjusting a back gate bias voltage applied to a back gate of loop transistor of the feedback loop.
Abstract translation: FDSOI集成电路管芯在输出节点上提供基于参考电压的稳压输出电压。 将第一电流传递到输出节点的传输晶体管。 反馈回路基于第一电流产生第二电流并基于第二电流向控制晶体管施加控制信号来调节输出电压。 环路电流适配器通过调整施加到反馈回路的环形晶体管的背栅的背栅偏置电压来适配第一和第二电流的比率。
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