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公开(公告)号：US11726514B2
公开(公告)日：2023-08-15
申请号：US17242067
申请日：2021-04-27
Applicant: STMicroelectronics International N.V.
Inventor： Shashwat , Rajesh Narwal
Abstract: An active compensation circuit for compensating the stability of a regulator is provided. The active compensation circuit presents an equivalent capacitance and an equivalent resistance and compensates stability of system using the equivalent capacitance and the equivalent resistance. The regulator includes a power transistor that receives a driving signal and channelize the required current to the Ips driven by this block. The regulator's stability is compensated using the active compensation circuit to provide an accurate output voltage without significantly compromising the accuracy (load regulation) and area of the system.
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公开(公告)号：US20220350357A1
公开(公告)日：2022-11-03
申请号：US17242067
申请日：2021-04-27
Applicant: STMicroelectronics International N.V.
Inventor： Shashwat , Rajesh Narwal
Abstract: An active compensation circuit for compensating the stability of a regulator is provided. The active compensation circuit presents an equivalent capacitance and an equivalent resistance and compensates stability of system using the equivalent capacitance and the equivalent resistance. The regulator includes a power transistor that receives a driving signal and channelize the required current to the Ips driven by this block. The regulator's stability is compensated using the active compensation circuit to provide an accurate output voltage without significantly compromising the accuracy (load regulation) and area of the system.
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公开(公告)号：US20240402738A1
公开(公告)日：2024-12-05
申请号：US18326876
申请日：2023-05-31
Applicant: STMicroelectronics International N.V.
Inventor： Rajesh Narwal , Shashwat
Abstract: The present disclosure is directed to a fully analog voltage regulator circuit with reference modulation. The voltage regulator circuit includes a low-dropout regulator, a voltage-to-current convert, a resistor-capacitor filter circuit, and an operational amplifier voltage buffer. The voltage regulator circuit minimizes dropout voltage of the circuit by comparing the output voltage of the voltage regulator to a reference voltage and adjusting the output voltage of the op amp voltage buffer, accordingly. The voltage regulator circuit includes two operational amplifiers, wherein the negative input of a first of the two operational amplifiers is coupled to the negative input of a second of the two operational amplifiers through the resistor-capacitor filter circuit.
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公开(公告)号：US11313900B2
公开(公告)日：2022-04-26
申请号：US17001131
申请日：2020-08-24
Applicant: STMicroelectronics International N.V.
Inventor： Pravesh Kumar Saini , Shashwat
IPC: G01R31/28 , H03K17/687 , H03K19/20 , G01R31/52
Abstract: An on chip leakage-current detection device including a first inverter where the magnitude of delay of the output signal of the first inverter is determined by a leakage current of a target device. The leakage-current detection device further includes: a capacitor that is charged by the output signal of the first inverter; a second inverter coupled to capacitor that switches states when the capacitor is charged to a switching level; an odd number of additional inverters coupled in a sequence with a second-inverter output. The output of the leakage-current detection device has a frequency proportional to the leakage of the target device.
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