公开(公告)号：US20040108875A1

公开(公告)日：2004-06-10

申请号：US10662952

申请日：2003-09-12

Applicant: STMicroelectronics Pvt. Ltd.

Inventor： Rajesh Kaushik ,  Rajesh Narwal

IPC: H03B001/00

CPC classification number: H03K17/166

Abstract: A CMOS output buffer uses feedback from a ground node to reduce ground bounce by utilizing a tolerable ground bounce limit, making it less sensitive to operating conditions and processing parameters. An input to the NMOS device of the output buffer is provided by the output of a control element which receives a first input from a pre-driver and a second input (i.e., the feedback) from the ground node.

Abstract translation: CMOS输出缓冲器使用来自接地节点的反馈，通过利用可容忍的接地反弹限制来减少接地反弹，使其对工作条件和处理参数的敏感性降低。 输出缓冲器的NMOS器件的输入由从接地节点接收来自预驱动器的第一输入和第二输入（即，反馈）的控制元件的输出提供。

公开(公告)号：US20040155689A1

公开(公告)日：2004-08-12

申请号：US10739879

申请日：2003-12-18

Applicant: STMicroelectronics Pvt. Ltd.

Inventor： Manoj Kumar ,  Rajesh Narwal

IPC: H03K003/037

CPC classification number: H03K3/3565

Abstract: A differential input receiver with hysteresis on both sides of the reference voltage may include a two-input, one-output differential amplifier including two input transistors having a common terminal connected together. The control terminal of each transistor may be connected to one of the inputs of the differential amplifier. The output of the differential amplifier may be connected to a set of cascaded digital inverters/buffers, and an output of each digital buffer may be connected to the control terminal of a feedback transistor. The feedback transistor may be connected in parallel across each of the input transistors so that when one input voltage increases above or decreases below the input voltage at the second input by a predetermined threshold value, the feedback transistors operate to provide positive feedback to facilitate a rapid switching action at the output.

Abstract translation: 具有参考电压两侧的迟滞的差分输入接收器可以包括双输入单输出差分放大器，其包括连接在一起的共同端子的两个输入晶体管。 每个晶体管的控制端可以连接到差分放大器的一个输入端。 差分放大器的输出可以连接到一组级联的数字反相器/缓冲器，并且每个数字缓冲器的输出可以连接到反馈晶体管的控制端子。 反馈晶体管可以并联连接在每个输入晶体管上，使得当一个输入电压在第二输入处增加到或低于第二输入处的输入电压以下预定阈值时，反馈晶体管操作以提供正反馈以促进快速 在输出端切换动作。