Hierarchical reconfigurable computer architecture
    1.
    发明授权
    Hierarchical reconfigurable computer architecture 有权
    分层可重构计算机体系结构

    公开(公告)号:US09323716B2

    公开(公告)日:2016-04-26

    申请号:US14329226

    申请日:2014-07-11

    Inventor: Joël Cambonie

    Abstract: A reconfigurable hierarchical computer architecture having N levels, where N is an integer value greater than one, wherein said N levels include a first level including a first computation block including a first data input, a first data output and a plurality of computing nodes interconnected by a first connecting mechanism, each computing node including an input port, a functional unit and an output port, the first connecting mechanism capable of connecting each output port to the input port of each other computing node; and a second level including a second computation block including a second data input, a second data output and a plurality of the first computation blocks interconnected by a second connecting means for selectively connecting the first data output of each of the first computation blocks and the second data input to each of the first data inputs and for selectively connecting each of the first data outputs to the second data output.

    Abstract translation: 一种具有N个级别的可重构分层计算机架构,其中N是大于1的整数值,其中所述N个级别包括第一级,包括第一计算块,所述第一级包括第一数据输入,第一数据输出和多个计算节点, 第一连接机构,每个计算节点包括输入端口,功能单元和输出端口,所述第一连接机构能够将每个输出端口连接到彼此的计算节点的输入端口; 以及第二级,包括第二计算块,包括第二数据输入,第二数据输出和通过第二连接装置互连的多个第一计算块,用于选择性地连接每个第一计算块和第二计算块的第一数据输出 数据输入到每个第一数据输入端,并且用于选择性地将每个第一数据输出连接到第二数据输出。

    HIERARCHICAL RECONFIGURABLE COMPUTER ARCHITECTURE
    2.
    发明申请
    HIERARCHICAL RECONFIGURABLE COMPUTER ARCHITECTURE 有权
    分层可重构计算机架构

    公开(公告)号:US20140325181A1

    公开(公告)日:2014-10-30

    申请号:US14329226

    申请日:2014-07-11

    Inventor: Joël Cambonie

    Abstract: A reconfigurable hierarchical computer architecture having N levels, where N is an integer value greater than one, wherein said N levels include a first level including a first computation block including a first data input, a first data output and a plurality of computing nodes interconnected by a first connecting mechanism, each computing node including an input port, a functional unit and an output port, the first connecting mechanism capable of connecting each output port to the input port of each other computing node; and a second level including a second computation block including a second data input, a second data output and a plurality of the first computation blocks interconnected by a second connecting means for selectively connecting the first data output of each of the first computation blocks and the second data input to each of the first data inputs and for selectively connecting each of the first data outputs to the second data output.

    Abstract translation: 一种具有N个级别的可重构分层计算机架构,其中N是大于1的整数值,其中所述N个级别包括第一级,包括第一计算块,所述第一级包括第一数据输入,第一数据输出和多个计算节点, 第一连接机构,每个计算节点包括输入端口,功能单元和输出端口,所述第一连接机构能够将每个输出端口连接到彼此的计算节点的输入端口; 以及第二级,包括第二计算块,包括第二数据输入,第二数据输出和通过第二连接装置互连的多个第一计算块,用于选择性地连接每个第一计算块和第二计算块的第一数据输出 数据输入到每个第一数据输入端,并且用于选择性地将每个第一数据输出连接到第二数据输出。

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