Microprocessor comprising input means in the test mode
    1.
    发明申请
    Microprocessor comprising input means in the test mode 有权
    微处理器包括测试模式下的输入装置

    公开(公告)号:US20020129234A1

    公开(公告)日:2002-09-12

    申请号:US09995251

    申请日:2001-11-27

    CPC classification number: G06F11/2273 G01R31/31701 G01R31/31719

    Abstract: A microprocessor includes a counter having a counting input and a reset input. The counting input is coupled to a first terminal of the microprocessor for the selection of an operating mode thereof by application of a predetermined number of pulses to the first terminal. The reset input of the counter is driven by a control signal present on a second terminal of the microprocessor. The control signal is maintained by default at a first logic value ensuring the maintaining at zero of the counter during the initialization period by a circuit internal or external the microprocessor. Immunity against electromagnetic perturbations causing the microprocessor to enter into the test mode is provided.

    Abstract translation: 微处理器包括具有计数输入和复位输入的计数器。 计数输入耦合到微处理器的第一端,用于通过向第一终端施加预定数量的脉冲来选择其操作模式。 计数器的复位输入由存在于微处理器的第二端子上的控制信号驱动。 控制信号默认维持在第一逻辑值,确保在初始化期间通过内部或外部微处理器的电路将计数器保持在零。 提供了防止导致微处理器进入测试模式的电磁扰动的抗扰度。

    Decimal set point clock generator and application of this clock generator to a uart circuit
    2.
    发明申请
    Decimal set point clock generator and application of this clock generator to a uart circuit 有权
    十进制设定点时钟发生器和该时钟发生器应用于uart电路

    公开(公告)号:US20040130361A1

    公开(公告)日:2004-07-08

    申请号:US10684823

    申请日:2003-10-14

    CPC classification number: G06F1/08

    Abstract: A programmable clock generator delivers, using a primary clock signal of determined frequency, a first clock signal the frequency of which is equal to the frequency of the primary clock signal divided by a set point M. The set point M is a decimal number comprising a whole part M1 and a decimal part M2 and the clock generator modulates the period of the pulses of the first clock signal so that the duration of Ni successive pulses is substantially equal to M*Ni times the period of the primary clock signal, Ni being a reference number for modulating the period of the pulses of the first clock signal.

    Abstract translation: 可编程时钟发生器使用确定频率的主时钟信号来传送其频率等于主时钟信号除以设定点M的频率的第一时钟信号。设定点M是十进制数,包括 整个部分M1和小数部分M2,并且时钟发生器调制第一时钟信号的脉冲的周期,使得Ni连续脉冲的持续时间基本上等于主时钟信号的周期的M * Ni,Ni是主时钟信号的周期 用于调制第一时钟信号的脉冲周期的参考号。

    Card reader comprising an energy-saving system
    3.
    发明申请
    Card reader comprising an energy-saving system 有权
    读卡器,包括节能系统

    公开(公告)号:US20020105234A1

    公开(公告)日:2002-08-08

    申请号:US10059444

    申请日:2002-01-29

    Abstract: A smart card reader includes a housing for receiving a smart card, a microprocessor, and a connector for connecting the microprocessor to the received smart card for establishing communications therebetween. A voltage source provides a power supply voltage to the microprocessor based upon the smart card being received in the housing. The smart card reader further includes a first switch interposed between the voltage source and a power supply terminal of the microprocessor. The first switch is closed when the received smart card is at an end of travel in the housing so that the power supply voltage is provided to the microprocessor, and is opened when the received smart card is no longer at the end of travel in the housing so that the power supply voltage is not provided to the microprocessor.

    Abstract translation: 智能卡读取器包括用于接收智能卡的壳体,微处理器和用于将微处理器连接到接收的智能卡的连接器,用于在其间建立通信。 电压源基于智能卡被接收在外壳中而向微处理器提供电源电压。 智能卡读卡器还包括插入在电压源和微处理器的电源端之间的第一开关。 当接收到的智能卡处于壳体行程结束时,第一开关闭合,使得电源电压被提供给微处理器,并且当接收到的智能卡不再在外壳中行进结束时打开 使得不向微处理器提供电源电压。

Patent Agency Ranking