公开(公告)号：US20020113535A1

公开(公告)日：2002-08-22

申请号：US09997195

申请日：2001-11-28

Applicant: STMicroelectronics S.A.

Inventor： Franck Roche ,  Thierry Bouquier

IPC: H01J027/00

CPC classification number: G06F11/2236

Abstract: A microprocessor may be switchable between a normal mode and a test mode for performing a test program and may include a central processing unit (CPU) for saving contextual data in a stack of the microprocessor at the time of switching to the test mode. The CPU may deliver, at the beginning of the test program and on an input/output port, contextual data present in the stack beginning with the top of the stack. The CPU may also decrement a stack pointer by a value corresponding to a number of contextual data delivered.

Abstract translation: 微处理器可以在正常模式和用于执行测试程序的测试模式之间切换，并且可以包括用于在切换到测试模式时将上下文数据保存在微处理器的堆栈中的中央处理单元（CPU）。 CPU可以在测试程序开始时和在输入/输出端口上递送以堆栈顶部开头的堆栈中存在的上下文数据。 CPU也可以将堆栈指针减少与传递的上下文数据的数量相对应的值。