Abstract:
The invention relates to an automatic decoding method for mapping and selecting a non-volatile memory device having a LPC serial communication interface in the available addressing area on motherboards. A logic structure is incorporated in the memory device, which allows a correct decoding to address the memory to the top of the addressable area or to the bottom of the same area, i.e., in both possible cases. This logic incorporates a non-volatile register whose information is stored in a Content Address Memory to enable the automatic mapping of the memory in the addressable memory area.
Abstract:
Described herein is a method for soft-programming an electrically erasable nonvolatile memory device, wherein soft-programming is carried out with a soft-programming multiplicity equal to twice that used for writing data in the memory device until the current absorbed during soft-programming is smaller than or equal to the maximum current which is available for writing operations and which can be generated within the memory device, and with a soft-programming multiplicity equal to the one used for writing data in the memory device in the case where the current absorbed during soft-programming with double multiplicity is greater than the maximum current which is available for writing operations and which can be generated within the memory device.