公开(公告)号：US20030113981A1

公开(公告)日：2003-06-19

申请号：US10284031

申请日：2002-10-29

Applicant: STMicroelectronics S.r.I.

Inventor： Chantal Combi ,  Matteo Fiorito ,  Marta Mottura ,  Giuseppe Visalli ,  Benedetto Vigna

IPC: H01L021/00 ,  H01L021/76

CPC classification number: H01L21/764 ,  H01L21/76208 ,  H01L21/76229 ,  H01L27/08

Abstract: A process for manufacturing a semiconductor wafer integrating electronic devices and a structure for electromagnetic decoupling are disclosed. The method includes providing a wafer of semiconductor material having a substrate; forming a plurality of first mutually adjacent trenches, open on a first face of the wafer, which have a depth and a width and define walls); by thermal oxidation, completely oxidizing the walls and filling at least partially the first trenches, so as to form an insulating structure of dielectric material; and removing one portion of the substrate comprised between the insulating structure and a second face of the wafer, opposite to the first face of the wafer.

Abstract translation: 公开了一种用于制造集成电子器件的半导体晶片和用于电磁去耦的结构的工艺。 该方法包括提供具有基板的半导体材料晶片; 形成多个第一相互相邻的沟槽，在晶片的第一面上开口，其具有深度和宽度并限定壁）; 通过热氧化，完全氧化壁并至少部分地填充第一沟槽，以形成介电材料的绝缘结构; 以及移除所述绝缘结构和所述晶片的与所述晶片的第一面相对的第二面之间的衬底的一部分。