Low-noise output buffer
    1.
    发明申请
    Low-noise output buffer 有权
    低噪声输出缓冲器

    公开(公告)号:US20030080781A1

    公开(公告)日:2003-05-01

    申请号:US10282487

    申请日:2002-10-28

    CPC classification number: H03K19/00361 H03K17/167

    Abstract: An output buffer for causing a voltage (Vout) of an integrated circuit output line (OUT,OUT13 PAD) to switch from a voltage of a first voltage line (VDD) to a voltage of a second voltage line (GND) and vice versa, comprises a current path switch circuit (111a,111b) activatable for causing a prescribed current (Is) to constantly flow between the first and second voltage lines during a time between two successive switchings of the output line, and for causing the prescribed current to be deviated (Ic1) to the output line during at least an initial phase of an output line switching from the first voltage line voltage to the second voltage line voltage or vice versa. A current delivered by the first and second voltage lines is thus kept substantially constant in the output line switching. In this way, the time derivative of the current flowing between the first and the second voltage lines is kept small and low switching noise is induced.

    Abstract translation: 一种用于使集成电路输出线(OUT,OUT13 PAD)的电压(Vout)从第一电压线(VDD)的电压切换到第二电压线(GND)的电压的输出缓冲器,反之亦然, 包括电流路径切换电路(111a,111b),其能够在输出线的两次连续切换之间的时间内使规定电流(Is)恒定地在第一和第二电压线之间流动,并且使规定电流为 在从第一电压线电压切换到第二电压线电压的输出线的至少初始相位期间偏离(Ic1)到输出线,反之亦然。 因此,输出线切换中由第一和第二电压线传递的电流基本保持恒定。 以这种方式,在第一和第二电压线之间流动的电流的时间导数保持较小,并且引起低的开关噪声。

    Negative charge pump architecture with self-generated boosted phases
    2.
    发明申请
    Negative charge pump architecture with self-generated boosted phases 有权
    负电荷泵结构,具有自发增压阶段

    公开(公告)号:US20030080804A1

    公开(公告)日:2003-05-01

    申请号:US09998902

    申请日:2001-10-31

    CPC classification number: H02M3/073 H02M2003/071 H02M2003/075

    Abstract: A negative charge pump circuit includes a cascade connection of a plurality of charge pump stages, each stage including at least a charge capacitance and a pass transistor driven by a corresponding phase signal. An input stage may be coupled to an input reference potential. An output stage may include an output terminal for generating a first pumped voltage. In addition, the charge pump circuit may further include a second output stage connected downstream to the input stage and including a second output terminal for generating a second pumped potential. The architecture may also be implemented in positive charge pump circuits.

    Abstract translation: 负电荷泵电路包括多个电荷泵级的级联,每级包括至少一个充电电容和由相应的相位信号驱动的通过晶体管。 输入级可以耦合到输入参考电位。 输出级可以包括用于产生第一泵送电压的输出端子。 此外,电荷泵电路还可以包括连接到输入级的下游的第二输出级,并且包括用于产生第二泵浦电位的第二输出端。 该结构也可以在正电荷泵电路中实现。

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