公开(公告)号：US20040218440A1

公开(公告)日：2004-11-04

申请号：US10789443

申请日：2004-02-27

Applicant: STMicroelectronics S.r.I.

Inventor： Promod Kumar ,  Francesco Tomaiuolo ,  Pierpaolo Nicosia ,  Luca Giuseppe De Ambroggi ,  Francesco Pipitone

IPC: G11C011/34

CPC classification number: G11C29/16 ,  G11C16/04 ,  G11C2029/0401 ,  G11C2029/0405

Abstract: An effective Electric Wafer Sort (EWS) flow is implemented by expanding the functions of the micro-controller embedded in a FLASH EPROM memory device and of the integrated test structures. The architecture provides for executing test routines internally without involving any external complex or expensive test equipment to control the test program. The processes are executed by the onboard micro-controllers (that may be reading either from an embedded ROM or from a GLOBAL CACHE provided). Managing test routines by an internal process permits the device architecture to be transparent from a tester point of view, by purposely creating a standard interface with a set of defined commands and instructions to be interpreted by the on board microcontroller and internally executed.

Abstract translation: 通过扩展嵌入在FLASH EPROM存储器件和集成测试结构中的微控制器的功能来实现有效的电晶片分级（EWS）流程。 该架构提供在内部执行测试例程，而不涉及任何外部复杂或昂贵的测试设备来控制测试程序。 这些过程由板载微控制器执行（可能是从嵌入式ROM或从提供的GLOBAL CACHE读取）。 通过内部进程来管理测试例程允许设备架构从测试人员的角度来看是透明的，目的是通过一组定义的命令和指令来创建标准接口，由板载微控制器解释并在内部执行。