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公开(公告)号:US11587866B2
公开(公告)日:2023-02-21
申请号:US17000165
申请日:2020-08-21
发明人: Francesco Maria Pipia , Ivan Venegoni , Annamaria Votta , Francesca Milanesi , Samuele Sciarrillo , Paolo Colpani
IPC分类号: H01L23/522 , H01L21/768 , H01L23/532 , H01L23/528 , H01L23/525
摘要: A method of manufacturing an integrated electronic device including a semiconductor body and a passivation structure including a frontal dielectric layer bounded by a frontal surface. A hole is formed extending into the frontal surface and through the frontal dielectric layer. A conductive region is formed in the hole. A barrier layer is formed in the hole and extends into the hole. A first coating layer covers a top and sides of a redistribution region of the conductive region and a second coating layer covers is formed covering the first coating layer. A capillary opening is formed extending into the first and second coating layers to the barrier layer. A cavity is formed between the redistribution region and the frontal surface and is bounded on one side by the first coating layer and on the other by the barrier structure by passing an aqueous solution through the capillary opening.
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公开(公告)号:US10790226B2
公开(公告)日:2020-09-29
申请号:US16044186
申请日:2018-07-24
发明人: Francesco Maria Pipia , Ivan Venegoni , Annamaria Votta , Francesca Milanesi , Samuele Sciarrillo , Paolo Colpani
IPC分类号: H01L23/522 , H01L21/768 , H01L23/532 , H01L23/528 , H01L23/525
摘要: An integrated electronic device includes a semiconductor body and a passivation structure including a frontal dielectric layer bounded by a frontal surface. A conductive region forms a via region, extending into a hole through the frontal dielectric layer. An overlaid redistribution region extends over the frontal surface. A barrier structure includes at least a first barrier region extending into the hole and surrounding the via region. The first barrier region extends over the frontal surface. A first coating layer covers the top and the sides of the redistribution region and a second coating layer covers the first coating layer. A cavity extends between the redistribution region and the frontal surface and is bounded on one side by the first coating layer and on the other by the barrier structure.
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公开(公告)号:US20190035727A1
公开(公告)日:2019-01-31
申请号:US16044186
申请日:2018-07-24
发明人: Francesco Maria Pipia , Ivan Venegoni , Annamaria Votta , Francesca Milanesi , Samuele Sciarrillo , Paolo Colpani
IPC分类号: H01L23/522 , H01L21/768 , H01L23/532
摘要: An integrated electronic device includes a semiconductor body and a passivation structure including a frontal dielectric layer bounded by a frontal surface. A conductive region forms a via region, extending into a hole through the frontal dielectric layer. An overlaid redistribution region extends over the frontal surface. A barrier structure includes at least a first barrier region extending into the hole and surrounding the via region. The first barrier region extends over the frontal surface. A first coating layer covers the top and the sides of the redistribution region and a second coating layer covers the first coating layer. A cavity extends between the redistribution region and the frontal surface and is bounded on one side by the first coating layer and on the other by the barrier structure.
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