公开(公告)号：US20010023094A1

公开(公告)日：2001-09-20

申请号：US09752149

申请日：2000-12-29

Applicant: STMicroelectronics S.r.l.

Inventor： Giuseppe D'Arrigo ,  Corrado Spinella ,  Salvatore Coffa ,  Giuseppe Arena ,  Marco Camalleri

IPC: H01L021/8238

CPC classification number: H01L21/3063 ,  C25F3/12 ,  H01L21/31662 ,  H01L21/32105 ,  H01L21/7624 ,  H01L21/76264 ,  H01L21/76286

Abstract: A method for fabricating a silicon-on-insulator (SOI) wafer that includes a monocrystalline silicon substrate with a doped region buried therein is provided. The method includes forming a plurality of trench-like openings extending from a surface of the substrate to the doped buried region, and selectively etching through the plurality of trench-like openings to change the doped buried region into a porous silicon region. The porous silicon region is oxidized to obtain an insulating region for the SOI wafer.

Abstract translation: 提供一种制造绝缘体上硅（SOI）晶片的方法，该方法包括其中埋有掺杂区的单晶硅衬底。 该方法包括形成从衬底的表面延伸到掺杂掩埋区的多个沟槽状开口，并且选择性地蚀刻穿过多个沟槽状开口以将掺杂掩埋区改变为多孔硅区。 多孔硅区域被氧化以获得用于SOI晶片的绝缘区域。