公开(公告)号：US20190181075A1

公开(公告)日：2019-06-13

申请号：US16212581

申请日：2018-12-06

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Dario VITELLO

IPC: H01L23/495 ,  H01L21/48

Abstract: A method of attaching a semiconductor die or chip onto a support member such as a leadframe comprises: applying onto the support member at least one stretch of ribbon electrical bonding material and coupling the ribbon material to the support member, arranging at least one semiconductor die onto the ribbon material with the ribbon material between the support member and the semiconductor die, coupling the semiconductor die to the ribbon material.

公开(公告)号：US20210183748A1

公开(公告)日：2021-06-17

申请号：US17124094

申请日：2020-12-16

Applicant: STMicroelectronics S.r.l.

Inventor： Michele DERAI ,  Dario VITELLO

IPC: H01L23/495 ,  H01L23/31 ,  H01L23/498 ,  H01L21/56

Abstract: A System in Package, SiP semiconductor device includes a substrate of laser direct structuring, LDS, material. First and second semiconductor die are arranged at a first and a second leadframe structure at opposite surfaces of the substrate of LDS material. Package LDS material is molded onto the second surface of the substrate of LDS material. The first semiconductor die and the package LDS material lie on opposite sides of the substrate of LDS material. A set of electrical contact formations are at a surface of the package molding material opposite the substrate of LDS material. The leadframe structures include laser beam processed LDS material. The substrate of LDS material and the package LDS material include laser beam processed LDS material forming at least one electrically-conductive via providing at least a portion of an electrically-conductive line between the first semiconductor die and an electrical contact formation at the surface of the package molding material opposite the substrate.

公开(公告)号：US20230402349A1

公开(公告)日：2023-12-14

申请号：US18335923

申请日：2023-06-15

Applicant: STMicroelectronics S.r.l.

Inventor： Michele DERAI ,  Dario VITELLO

IPC: H01L23/495 ,  H01L21/56 ,  H01L23/31 ,  H01L23/498

CPC classification number: H01L23/49537 ,  H01L21/56 ,  H01L23/3121 ,  H01L23/49579 ,  H01L23/49827

Abstract: A System in Package, SiP semiconductor device includes a substrate of laser direct structuring, LDS, material. First and second semiconductor die are arranged at a first and a second leadframe structure at opposite surfaces of the substrate of LDS material. Package LDS material is molded onto the second surface of the substrate of LDS material. The first semiconductor die and the package LDS material lie on opposite sides of the substrate of LDS material. A set of electrical contact formations are at a surface of the package molding material opposite the substrate of LDS material. The leadframe structures include laser beam processed LDS material. The substrate of LDS material and the package LDS material include laser beam processed LDS material forming at least one electrically-conductive via providing at least a portion of an electrically-conductive line between the first semiconductor die and an electrical contact formation at the surface of the package molding material opposite the substrate.

公开(公告)号：US20220199477A1

公开(公告)日：2022-06-23

申请号：US17549058

申请日：2021-12-13

Applicant: STMicroelectronics S.r.l.

Inventor： Michele DERAI ,  Dario VITELLO

IPC: H01L23/29 ,  H01L21/48 ,  H01L23/495 ,  H01L23/31

Abstract: A method of manufacturing semiconductor devices, such as QFN/BGA flip-chip type packages, arranging on a leadframe one or more semiconductor chips or dice having a first side facing towards the leadframe and electrically coupled therewith and a second side facing away from the leadframe. The method also includes molding an encapsulation on the semiconductor chip(s) arranged on the leadframe, where the encapsulation has an outer surface opposite the leadframe and comprises laser direct structuring (LDS) material. Laser direct structuring processing is applied to the LDS material of the encapsulation to provide metal vias between the outer surface of the encapsulation and the second side of the semiconductor chip(s) and as well as a metal pad at the outer surface of the encapsulation.

公开(公告)号：US20220238473A1

公开(公告)日：2022-07-28

申请号：US17573172

申请日：2022-01-11

Applicant: STMicroelectronics S.r.l.

Inventor： Dario VITELLO ,  Michele DERAI

IPC: H01L23/00 ,  H01L23/495

Abstract: A semiconductor chip includes an electrical contact layer covered by a passivation layer. The semiconductor chip is encapsulated in an encapsulation formed by laser-direct-structuring (LDS) material. Laser beam energy is applied to the encapsulation to structure therein a through via passing through the encapsulation and removing the passivation layer at a bonding site of the electrical contact layer of the at least one semiconductor chip. The through via structured in the encapsulation is made electrically conductive so that the electrically-conductive through via is electrically coupled to, optionally in direct contact with, the electrical contact layer at a bonding site where the passivation layer has been removed.

公开(公告)号：US20190181076A1

公开(公告)日：2019-06-13

申请号：US16213540

申请日：2018-12-07

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Dario VITELLO ,  Fabio MARCHISI ,  Alberto ARRIGONI ,  Federico FREGO ,  Federico Giovanni ZIGLIOLI ,  Paolo CREMA

IPC: H01L23/495 ,  H01L21/48 ,  B26F1/38 ,  B23C3/13 ,  C23F1/02

Abstract: A method of producing leadframes for semiconductor devices comprises: providing a plurality of electrically-conductive plates, forming in the electrically conductive plates homologous passageway patterns according to a desired semiconductor device leadframe pattern, joining together the plurality of plates with the homologous passageway patterns formed therein mutually in register by producing a multilayered leadframe exhibiting the desired leadframe pattern and a thickness which is the sum of the thicknesses of the plates in the plurality of electrically-conductive plates.

公开(公告)号：US20240038636A1

公开(公告)日：2024-02-01

申请号：US18224701

申请日：2023-07-21

Applicant: STMicroelectronics S.r.l.

Inventor： Dario VITELLO

IPC: H01L23/495 ,  H01L23/31 ,  H01L21/56

CPC classification number: H01L23/49541 ,  H01L23/49503 ,  H01L23/3107 ,  H01L21/561

Abstract: A semiconductor die mounting substrate, such as a pre-molded leadframe, is provided with die pads, wherein each die pad has opposed first and second surfaces as well as tie bars projecting therefrom. Semiconductor dice are mounted at the first surface of the die pads. A molding encapsulation material surrounds the semiconductor dice mounted at the first surface of the die pads to produce semiconductor devices, with the semiconductor devices being mutually coupled via the tie bars. The tie bars are then cut transverse to their longitudinal direction at an intermediate singulation location to singulate the semiconductor devices into individual semiconductor devices. The tie bars have a hollowed-out portion with a channel-shaped cross-sectional profile at the intermediate singulation location. Easier-to-cut tie bars can be provided without impairing their stiffness in comparison with tie bars having full rectangular/square cross-sectional shapes.

公开(公告)号：US20230360928A1

公开(公告)日：2023-11-09

申请号：US18140290

申请日：2023-04-27

Applicant: STMicroelectronics S.r.l.

Inventor： Marco ROVITTO ,  Dario VITELLO

IPC: H01L21/56 ,  H01L21/48 ,  H01L23/00 ,  H01L23/495 ,  H01L23/498 ,  H01L21/768

CPC classification number: H01L21/565 ,  H01L21/4825 ,  H01L23/562 ,  H01L23/49513 ,  H01L23/49548 ,  H01L23/49827 ,  H01L21/76894 ,  H01L21/4842

Abstract: A semiconductor die is attached on a die mounting surface of a substrate. An insulating encapsulation of laser direct structuring (LDS) material is molded onto the substrate and the semiconductor die. The insulating encapsulation of LDS material has a front surface including a first portion and a second portion separated by gaps therebetween. Laser direct structuring processing is applied to the first portion of the front surface to structure in the encapsulation of LDS material electrically conductive formations including electrically conductive lines over the front surface and to the second portion of the front surface of the encapsulation of LDS material to form thereon a reinforcing warp-countering structure. The separation gaps are left exempt from laser direct structuring processing and the reinforcing warp-countering structure is electrically insulated from the electrically conductive lines by LDS material left exempt from laser direct structuring processing at the separation gaps.

公开(公告)号：US20230035445A1

公开(公告)日：2023-02-02

申请号：US17872893

申请日：2022-07-25

Applicant: STMicroelectronics S.r.l.

Inventor： Dario VITELLO ,  Michele DERAI

IPC: H01L23/495 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56

Abstract: An encapsulation of laser direct structuring (LDS) material is molded onto first and second semiconductor dice. A die-to-die coupling formation between the first and second semiconductor dice includes die vias extending through the LDS material to reach the first and second semiconductor dice and a die-to-die line extending at a surface of the encapsulation between the die vias. After laser activating and structuring selected locations of the surface of the encapsulation for the die vias and die-to-die line, the locations are placed into contact with an electrode that provides an electrically conductive path. Metal material is electrolytically grown onto the locations of the encapsulation by exposure to an electrolyte carrying metal cations. The metal cations are reduced to metal material via a current flowing through the electrically conductive path provided via the electrode. The electrode is then disengaged from contact with the locations having metal material electrolytically grown thereon.