公开(公告)号：US20220028769A1

公开(公告)日：2022-01-27

申请号：US17498328

申请日：2021-10-11

Applicant: STMicroelectronics S.r.l.

Inventor： Federico Giovanni ZIGLIOLI

IPC: H01L23/498 ,  H01L23/31 ,  H01L21/48 ,  H01L21/768 ,  H01L23/00 ,  H01L21/60

Abstract: A semiconductor chip is mounted on a leadframe. A first portion of an insulating package for the semiconductor chip is formed from laser direct structuring (LDS) material molded onto the semiconductor chip. A conductive formation (provided by laser-drilling the LDS material and plating) extends between the outer surface of the first portion of insulating package and the semiconductor chip. An electrically conductive clip is applied onto the outer surface of the first portion of the insulating package, with the electrically conductive clip electrically coupled to the conductive formation and the leadframe. A second portion of the insulating package is made from package molding material (epoxy compound) molded onto the electrically conductive clip and applied onto the outer surface of the first portion of the insulating package.

公开(公告)号：US20170275152A1

公开(公告)日：2017-09-28

申请号：US15621359

申请日：2017-06-13

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Federico Giovanni ZIGLIOLI

IPC: B81B3/00 ,  B81C1/00 ,  H01L23/00 ,  H04R19/00 ,  H01L23/31 ,  H01L25/00

CPC classification number: B81B3/0021 ,  B81B2201/0257 ,  B81C1/00269 ,  B81C2203/0118 ,  B81C2203/0154 ,  H01L23/3142 ,  H01L24/97 ,  H01L25/50 ,  H01L2924/181 ,  H04R19/005 ,  H01L2924/00012

Abstract: In order to manufacture a packaged device, a die having a sensitive region is bonded to a support, and a packaging mass of moldable material is molded on the support so as to surround the die. During molding of the packaging mass, a chamber is formed, which faces the sensitive region and is connected to the outside environment. To this end, a sacrificial mass of material that may evaporate/sublimate is dispensed on the sensitive region; the packaging mass is molded on the sacrificial mass; a through hole is formed in the packaging mass to extend as far as the sacrificial mass; the sacrificial mass is evaporated/sublimated through the hole.

公开(公告)号：US20160245709A1

公开(公告)日：2016-08-25

申请号：US14626153

申请日：2015-02-19

Applicant: STMICROELECTRONICS S.r.l.

Inventor： Alberto PAGANI ,  Federico Giovanni ZIGLIOLI ,  Bruno MURARI

IPC: G01L1/20

CPC classification number: G01L5/0038 ,  F16B31/028 ,  G01L1/18 ,  G01L1/20

Abstract: A pressure sensing device may include a body configured to distribute a load applied between first and second parts positioned one against the other, and a pressure sensor carried by the body. The pressure sensor may include a support body, and an IC die mounted with the support body and defining a cavity. The IC die may include pressure sensing circuitry responsive to bending associated with the cavity, and an IC interface coupled to the pressure sensing circuitry.

Abstract translation: 压力感测装置可以包括构造成分配施加在彼此定位的第一和第二部件之间的负载的主体和由主体承载的压力传感器。 压力传感器可以包括支撑体和安装有支撑体并且限定空腔的IC模具。 IC芯片可以包括响应于与空腔相关联的弯曲的压力感测电路，以及耦合到压力感测电路的IC接口。

公开(公告)号：US20210167000A1

公开(公告)日：2021-06-03

申请号：US17108270

申请日：2020-12-01

Applicant: STMicroelectronics S.r.l.

Inventor： Federico Giovanni ZIGLIOLI ,  Alberto PINTUS ,  Pierangelo MAGNI

IPC: H01L23/495 ,  H01L21/48 ,  H01L21/56

Abstract: A plastic material substrate has a die mounting location for a semiconductor die. Metallic traces are formed on selected areas of the plastic material substrate, wherein the metallic traces provide electrically-conductive paths for coupling to the semiconductor die. The semiconductor die is attached onto the die mounting location. The semiconductor die attached onto the die mounting location is electrically bonded to selected ones of the metallic traces formed on the plastic material substrate. A package material is molded onto the semiconductor die attached onto the die mounting location.

公开(公告)号：US20180342453A1

公开(公告)日：2018-11-29

申请号：US15973049

申请日：2018-05-07

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Federico Giovanni ZIGLIOLI

IPC: H01L23/498 ,  H01L21/56 ,  H01L21/48 ,  H01L23/00 ,  H01L23/31 ,  H01L25/10 ,  H01L25/00

Abstract: A method of manufacturing semiconductor products includes: providing a semiconductor product lead frame including a semiconductor die mounting area and an array of electrically conductive leads, molding semiconductor product package molding material, e.g., laser direct structuring material, and forming on the package molding material molded onto the lead frame electrically-conductive lines extending between the semiconductor die mounting area and the array of electrically-conductive leads.

公开(公告)号：US20180342433A1

公开(公告)日：2018-11-29

申请号：US15975629

申请日：2018-05-09

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Federico Giovanni ZIGLIOLI ,  Pierangelo MAGNI

IPC: H01L23/31 ,  H01L23/498 ,  H01L21/56 ,  H01L21/48

Abstract: A method of manufacturing semiconductor devices includes providing one or more semiconductor chips having a surface with electrical contact pads and a package mass encapsulating the semiconductor chip. The package mass includes a recessed portion leaving the semiconductor chip surface with the contact pads exposed, the recessed portion having a peripheral wall extending from the surface of the semiconductor chip to the outer surface of the package mass. Electrically-conductive formations are provided extending over the peripheral wall of the recessed portion with proximal ends electrically coupled with the contact pads of the semiconductor chip and distal ends at the outer surface of the package mass. The recessed portion is filled with a further package mass by leaving the distal ends of the electrically-conductive formations uncovered.

公开(公告)号：US20170317060A1

公开(公告)日：2017-11-02

申请号：US15365529

申请日：2016-11-30

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Federico Giovanni ZIGLIOLI

IPC: H01L25/065 ,  H01L21/48 ,  H01L23/495

Abstract: A semiconductor device includes: one or more semiconductor dice, a die pad supporting the semiconductor die or dice, a package molded onto the semiconductor die or dice supported by said die pad, wherein the die pad is exposed at the surface of the package, and the exposed die pad with an etched pattern therein to form at least one electrical contact land in the die pad.

公开(公告)号：US20220392830A1

公开(公告)日：2022-12-08

申请号：US17887838

申请日：2022-08-15

Applicant: STMicroelectronics S.r.l.

Inventor： Federico Giovanni ZIGLIOLI ,  Alberto PINTUS ,  Pierangelo MAGNI

IPC: H01L23/495 ,  H01L21/48 ,  H01L21/56

Abstract: A plastic material substrate has a die mounting location for a semiconductor die. Metallic traces are formed on selected areas of the plastic material substrate, wherein the metallic traces provide electrically-conductive paths for coupling to the semiconductor die. The semiconductor die is attached onto the die mounting location. The semiconductor die attached onto the die mounting location is electrically bonded to selected ones of the metallic traces formed on the plastic material substrate. A package material is molded onto the semiconductor die attached onto the die mounting location.

公开(公告)号：US20190378774A1

公开(公告)日：2019-12-12

申请号：US16551272

申请日：2019-08-26

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Federico Giovanni ZIGLIOLI

IPC: H01L23/31 ,  H01L21/56 ,  H01L21/48 ,  H01L21/78 ,  H01L23/00 ,  H01L23/538 ,  H01L23/16 ,  H01L23/367 ,  H01L21/288 ,  H01L21/683 ,  H01L21/768 ,  H01L21/3105

Abstract: An assembly is provided including one or more semiconductor dice attached on a substrate, the semiconductor die provided with electrically-conductive stud bumps opposite the substrate. The stud bumps embedded in a molding compound molded thereon are exposed to grinding thus leveling the molding compound to expose the distal ends of the stud bumps at a surface of the molding compound. Recessed electrically-conductive lines extending over said surface of the molding compound with electrically-conductive lands over the distal ends of the stud bumps. A further molding compound is provided to cover the recessed electrically-conductive lines and surrounding the electrically-conductive lands.

公开(公告)号：US20190115287A1

公开(公告)日：2019-04-18

申请号：US16151748

申请日：2018-10-04

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Michele DERAI ,  Federico Giovanni ZIGLIOLI

IPC: H01L23/495 ,  H01L21/56 ,  H01L23/31 ,  H01L23/00

Abstract: A method of manufacturing semiconductor devices such as integrated circuits comprises: providing one or more semiconductor chips having first and second opposed surfaces, coupling the semiconductor chip or chips with a support substrate with the second surface towards the support substrate, embedding the semiconductor chip or chips coupled with the support substrate in electrically-insulating packaging material by providing in the packaging material electrically-conductive passageways. The electrically-conductive passageways comprise: electrically-conductive chip passageways towards the first surface of the at least one semiconductor chip, and/or electrically-conductive substrate passageways towards the support substrate.