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公开(公告)号：US11720128B2
公开(公告)日：2023-08-08
申请号：US17362532
申请日：2021-06-29
Applicant: STMicroelectronics S.r.l.
Inventor： Enrico Mammei , Francesco Ravelli , Edoardo Contini , Paolo Pulici
Abstract: In an embodiment, a linear voltage regulator includes: an output transistor having a first current path terminal configured to be coupled to a load, and a second current path terminal coupled to a first supply terminal, where the output transistor is configured to provide, at the first current path terminal, a regulated output voltage; a voltage source circuit configured to provide, in an open loop manner, a first voltage to a control terminal of the output transistor; and a feedback loop coupled between the first current path terminal of the output transistor and the control terminal of the output transistor, the feedback loop including a sense transistor having a first current path terminal coupled to the first current path terminal of the output transistor.
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公开(公告)号：US20220413531A1
公开(公告)日：2022-12-29
申请号：US17362532
申请日：2021-06-29
Applicant: STMicroelectronics S.r.l.
Inventor： Enrico Mammei , Francesco Ravelli , Edoardo Contini , Paolo Pulici
Abstract: In an embodiment, a linear voltage regulator includes: an output transistor having a first current path terminal configured to be coupled to a load, and a second current path terminal coupled to a first supply terminal, where the output transistor is configured to provide, at the first current path terminal, a regulated output voltage; a voltage source circuit configured to provide, in an open loop manner, a first voltage to a control terminal of the output transistor; and a feedback loop coupled between the first current path terminal of the output transistor and the control terminal of the output transistor, the feedback loop including a sense transistor having a first current path terminal coupled to the first current path terminal of the output transistor.
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