-
公开(公告)号:US11657846B1
公开(公告)日:2023-05-23
申请号:US17710608
申请日:2022-03-31
Applicant: STMicroelectronics S.r.l. , STMicroelectronics, Inc.
Inventor: Enrico Mammei , Paolo Sanna , Dennis Hogg , Edoardo Contini
IPC: G11B20/10
CPC classification number: G11B20/10027
Abstract: A method to determine a relative delay between a current-overshoot signal and a write data signal for a hard disk drive preamplifier, the method including using a memory element to strobe a test current-overshoot signal with a test data signal; counting a number of strobed transitions of the test current-overshoot signal; adjusting the delay based on the number of strobed transitions; setting a phase difference between the current-overshoot signal and the write data signal according to the delay; and using the memory element to strobe the current-overshoot signal with the write data signal.
-
公开(公告)号:US11720128B2
公开(公告)日:2023-08-08
申请号:US17362532
申请日:2021-06-29
Applicant: STMicroelectronics S.r.l.
Inventor: Enrico Mammei , Francesco Ravelli , Edoardo Contini , Paolo Pulici
Abstract: In an embodiment, a linear voltage regulator includes: an output transistor having a first current path terminal configured to be coupled to a load, and a second current path terminal coupled to a first supply terminal, where the output transistor is configured to provide, at the first current path terminal, a regulated output voltage; a voltage source circuit configured to provide, in an open loop manner, a first voltage to a control terminal of the output transistor; and a feedback loop coupled between the first current path terminal of the output transistor and the control terminal of the output transistor, the feedback loop including a sense transistor having a first current path terminal coupled to the first current path terminal of the output transistor.
-
公开(公告)号:US20220413531A1
公开(公告)日:2022-12-29
申请号:US17362532
申请日:2021-06-29
Applicant: STMicroelectronics S.r.l.
Inventor: Enrico Mammei , Francesco Ravelli , Edoardo Contini , Paolo Pulici
Abstract: In an embodiment, a linear voltage regulator includes: an output transistor having a first current path terminal configured to be coupled to a load, and a second current path terminal coupled to a first supply terminal, where the output transistor is configured to provide, at the first current path terminal, a regulated output voltage; a voltage source circuit configured to provide, in an open loop manner, a first voltage to a control terminal of the output transistor; and a feedback loop coupled between the first current path terminal of the output transistor and the control terminal of the output transistor, the feedback loop including a sense transistor having a first current path terminal coupled to the first current path terminal of the output transistor.
-
-