公开(公告)号：US20020033726A1

公开(公告)日：2002-03-21

申请号：US09917613

申请日：2001-07-26

Applicant: STMicroelectronics S.r.l.

Inventor： Marco Riva

IPC: H03L005/00

CPC classification number: H03K17/162 ,  H03K17/165

Abstract: A decoupling circuit for decoupling conduction lines from each other, the circuit including at least one pass gate element having conduction terminals connected to the conduction lines and having at least one control terminal. The decoupling circuit includes at least one protection circuit inserted between the control terminal and at least one of the conduction lines, and including at least one protection transistor connected to the control terminal and to the at least one conduction line, and configured to take in a disturbing signal passing through the pass gate element (N1) to properly decouple the conduction lines from each other on the occurrence of a disturbing condition.

Abstract translation: 一种用于使导线彼此去耦的去耦电路，该电路包括至少一个具有连接到导线并具有至少一个控制端的导通端的通栅元件。 去耦电路包括至少一个保护电路，其插入在控制端与至少一个导线之间，并且包括连接到控制端和至少一个导线的至少一个保护晶体管， 干扰信号通过通过栅极元件（N1），以便在发生干扰条件时使导线彼此适当地解耦。

公开(公告)号：US20040037144A1

公开(公告)日：2004-02-26

申请号：US10438175

申请日：2003-05-13

Applicant: STMicroelectronics S.r.l.

Inventor： Luigi Pascucci ,  Paolo Rolandi ,  Marco Riva

IPC: G11C007/00

CPC classification number: G11C11/5628

Abstract: A method for programming a non-volatile memory device of the multi-level type, includes a plurality of transistor cells grouped into memory words and conventionally provided with gate and drain terminals. The method applies different drain voltage values at different threshold values. Such values are directly proportional to the threshold levels to be attained by the individual memory word bits, and effective to provide for a simultaneous attainment of the levels, in a seeking-to manner, of the levels at the end of a limited number of pulses. Advantageously, a constant gate voltage value is concurrently applied to the gate terminals of said cells, such that the cell programming time is unrelated to the threshold level sought.

Abstract translation: 一种用于对多电平型非易失性存储器件进行编程的方法包括分组成存储字的多个晶体管单元，并且通常设置有栅极和漏极端子。 该方法在不同的阈值下应用不同的漏极电压值。 这些值与各个存储器字位要达到的阈值水平成正比，并有效地提供了在有限数量的脉冲结束时以寻求方式获得电平的电平 。 有利地，恒定栅极电压值同时施加到所述单元的栅极端子，使得单元编程时间与所寻求的阈值水平无关。