LED driver circuit and method
    1.
    发明授权

    公开(公告)号:US11212893B2

    公开(公告)日:2021-12-28

    申请号:US16885507

    申请日:2020-05-28

    Abstract: An apparatus includes a digital-to-analog converter coupled in series with a source follower, wherein the digital-to-analog converter is configured to control a current flowing through the source follower, and an amplifier having a first input coupled to a reference generator, a second input coupled to a common node of the source follower and the digital-to-analog converter, and an output coupled to a gate of the source follower.

    LED DRIVER CIRCUIT AND METHOD
    2.
    发明申请

    公开(公告)号:US20210378066A1

    公开(公告)日:2021-12-02

    申请号:US16885507

    申请日:2020-05-28

    Abstract: An apparatus includes a digital-to-analog converter coupled in series with a source follower, wherein the digital-to-analog converter is configured to control a current flowing through the source follower, and an amplifier having a first input coupled to a reference generator, a second input coupled to a common node of the source follower and the digital-to-analog converter, and an output coupled to a gate of the source follower.

    Digital output buffer circuits with reduced input/output delay

    公开(公告)号:US10826466B1

    公开(公告)日:2020-11-03

    申请号:US16583985

    申请日:2019-09-26

    Abstract: A half buffer circuit includes a current source coupled to a first node, a ground connection coupled to a second node, a feedback capacitor coupled between the first node and an output of the half buffer circuit, a transconductor element comprising a first input/output, a second input/output, and a transconductor element control input, and a switch network coupled between the first node and the second node. The first input/output is coupled to the output of the half buffer circuit. The second input/output is coupled to a ground connection. The switch network includes a first switch coupled between the first node and the second node, a second switch coupled between the first node and the transconductor element control input, and a third switch coupled between the second node and the transconductor element control input.

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