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公开(公告)号：US20250015708A1
公开(公告)日：2025-01-09
申请号：US18218750
申请日：2023-07-06
Applicant: STMicroelectronics S.r.l. , Politecnico Di Milano
Inventor： Lorenzo CREMONESI , Paolo MELILLO , Alessandro GASPARINI , Massimo GHIONI , Salvatore LEVANTINO
Abstract: Disclosed herein is a DC-DC converter, including a high-side power switch coupled between an input voltage and a switched node and a low-side power switch coupled between the switched node and ground. An inductor is coupled between the switched node and an output node. An output capacitor is coupled between the output node and ground. A control circuit is configured to operate the high-side power switch in a constant charge mode of operation to vary on-time of the high-side power switch to maintain a constant amount of charge being transferred to the output capacitor during each charging cycle, independent of variation of the input voltage.
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2.发明申请公开(公告)号：US20230034786A1
公开(公告)日：2023-02-02
申请号：US17869508
申请日：2022-07-20
Applicant: STMicroelectronics S.r.l.
Inventor： Alessandro DAGO , Alessandro GASPARINI , Osvaldo Enrico ZAMBETTI , Salvatore LEVANTINO , Massimo Antonio GHIONI
Abstract: First and second circuit branches are coupled between an input node and ground. Each circuit branch includes a series coupling first-fourth transistors in a current flow path with an output node. A first capacitor is coupled between a first capacitor node and a second capacitor node intermediate the first transistor and the second transistor in the first circuit branch. A second capacitor is coupled between a third capacitor node and a fourth capacitor node intermediate the first transistor and the second transistor in the second circuit branch. An inter-branch circuit block between the first and second branches includes a first inter-branch transistor coupled between the first capacitor node in the first circuit branch and the fourth capacitor node in the second circuit branch and a second inter-branch transistor coupled between the third capacitor node in the second circuit branch and the second capacitor node in the first circuit branch.
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Patent Agency Ranking
公开(公告)号：US20240128871A1
公开(公告)日：2024-04-18
申请号：US18376277
申请日：2023-10-03
Applicant: STMicroelectronics S.r.l.
Inventor： Alessandro BERTOLINI , Alessandro GASPARINI , Paolo MELILLO , Salvatore LEVANTINO , Massimo GHIONI
Abstract: A boost DC-DC converter includes a switching network, coupled to an inductor, controlled by a PWM driving signal. A control loop receives a voltage output and provides the PWM driving signal. The control loop generates an error signal as a function of a difference between voltage output voltage and a reference, with the PWM driving signal generated based on the error signal. A low pass filter circuit within the control loop receives the PWM driving signal and provides at least one filtered signal. An adder node of the control loop receives the at least one filtered signal from the low pass filter circuit for addition to the at least one filtered signal. The PWM driving signal is generated as a function of a sum of the filtered signal and the error signal.
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公开(公告)号：US20230336078A1
公开(公告)日：2023-10-19
申请号：US18132774
申请日：2023-04-10
Applicant: STMicroelectronics S.r.l.
Inventor： Alessandro BERTOLINI , Alessandro GASPARINI , Paolo MELILLO , Salvatore LEVANTINO , Massimo GHIONI
CPC classification number: H02M3/158 , H02M1/0095 , H02M3/157
Abstract: In a multi-level hybrid DC-DC converter with a flying capacitor, a feedback circuit includes a first oscillator and produces a first clock signal with a frequency dependent on an output voltage. A second oscillator produces a second clock signal having a frequency dependent on a reference voltage. A logic circuit switches, as a function of the first and second clock signals, connection of the flying capacitor between one state where the flying capacitor is connected between an input node and a switching node, and another state where the capacitor is connected between the switching node and a ground node. The duty cycle of the first/second clock signal varies so that when the flying capacitor voltage is lower than a target voltage a duration of the one state is increased, and when the flying capacitor voltage is higher than the target voltage a duration of the another state is increased.
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公开(公告)号：US20220216789A1
公开(公告)日：2022-07-07
申请号：US17569296
申请日：2022-01-05
Applicant: STMicroelectronics S.r.l.
Inventor： Alessandro GASPARINI , Alessandro BERTOLINI , Mauro LEONCINI , Massimo GHIONI , Salvatore LEVANTINO
Abstract: A time based boost DC-DC converter generates an output voltage using an inductor. A voltage error between the output voltage and a reference voltage is determined and processed in a) an integral control branch which converts the voltage error into an integral control current signal used to control a current controlled oscillator, and b) a proportional branch which converts the voltage error into a proportional control current signal used to control signal a delay line. Current flowing in the inductor is sensed, attenuated and used to apply adjustment to the integral and proportional control current signals. The output from the current controlled oscillator is passed through the delay line and phase detected in order to generate pulse width modulation (PWM) control signaling driving switch operation in the converter.
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6.发明公开公开(公告)号：US20240356443A1
公开(公告)日：2024-10-24
申请号：US18758327
申请日：2024-06-28
Applicant: STMicroelectronics S.r.l.
Inventor： Alessandro GASPARINI , Alessandro BERTOLINI , Mauro LEONCINI , Massimo GHIONI , Salvatore LEVANTINO
CPC classification number: H02M3/158 , H02M1/0009 , H02M1/0025
Abstract: A time based boost DC-DC converter generates an output voltage using an inductor. A voltage error between the output voltage and a reference voltage is determined and processed in a) an integral control branch which converts the voltage error into an integral control current signal used to control a current controlled oscillator, and b) a proportional branch which converts the voltage error into a proportional control current signal used to control signal a delay line. Current flowing in the inductor is sensed, attenuated and used to apply adjustment to the integral and proportional control current signals. The output from the current controlled oscillator is passed through the delay line and phase detected in order to generate pulse width modulation (PWM) control signaling driving switch operation in the converter.
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公开(公告)号：US20230055825A1
公开(公告)日：2023-02-23
申请号：US17885901
申请日：2022-08-11
Applicant: STMicroelectronics S.r.l.
Inventor： Alessandro GASPARINI , Mauro LEONCINI , Claudio LUISE , Alberto CATTANI , Massimo GHIONI , Salvatore LEVANTINO
IPC: H02M3/158 , H05B45/3725
Abstract: A Single Input Dual Output converter includes a first switch coupling an input to a first inductor terminal, a second switch coupling a second inductor terminal to ground, a third switch coupling the second inductor terminal to a positive output, and a fourth switch coupling the first inductor terminal to a negative output. During time-shared control, the negative and positive outputs are independently served by conversion cycles. Each conversion cycle includes: a positive phase with a positive charge phase (closing only the first and second switches), followed by an additional phase (closing only the first and third switches for a given time duration), and followed by a positive discharge phase (closing only the third and fourth switches). Each conversion cycle further includes a negative phase with a negative charge phase (closing only the first and second switches) followed by a negative discharge phase (closing only the second and fourth switches).
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