公开(公告)号：US11309237B2

公开(公告)日：2022-04-19

申请号：US16586643

申请日：2019-09-27

Applicant: STMICROELECTRONICS S.r.l. ,  STMICROELECTRONICS (MALTA) LTD

Inventor： Marco Del Sarto ,  Alex Gritti ,  Pierpaolo Recanatini ,  Michael Borg

IPC: H01L23/498 ,  H01L23/31

Abstract: The present disclosure is directed to a semiconductor package including a substrate having a lower surface with a plurality of slot structures. The plurality of slot structures are multi-layer structures that encourage the formation of solder joints. The semiconductor package is desirable for high reliability applications in which each solder joint termination should be checked by visual systems to ensure a proper electrical connection has been made.

公开(公告)号：US12148628B2

公开(公告)日：2024-11-19

申请号：US17942843

申请日：2022-09-12

Applicant: STMicroelectronics S.r.l. ,  STMicroelectronics (MALTA) Ltd

Inventor： Roseanne Duca ,  Dario Paci ,  Pierpaolo Recanatini

IPC: H01L21/324 ,  H01L23/16 ,  H01L23/31

Abstract: A leadframe includes a die pad and a set of electrically conductive leads. A semiconductor die, having a front surface and a back surface opposed to the front surface, is arranged on the die pad with the front surface facing away from the die pad. The semiconductor die is electrically coupled to the electrically conductive leads. A package molding material is molded over the semiconductor die arranged on the die pad. A stress absorbing material contained within a cavity delimited by a peripheral wall on the front surface of the semiconductor die is positioned intermediate at least one selected portion of the front surface of the semiconductor die and the package molding material.

公开(公告)号：US11443958B2

公开(公告)日：2022-09-13

申请号：US17108471

申请日：2020-12-01

Applicant: STMicroelectronics S.r.l. ,  STMicroelectronics (Malta) Ltd

Inventor： Roseanne Duca ,  Dario Paci ,  Pierpaolo Recanatini

IPC: H01L21/324 ,  H01L23/16 ,  H01L23/31

Abstract: A leadframe includes a die pad and a set of electrically conductive leads. A semiconductor die, having a front surface and a back surface opposed to the front surface, is arranged on the die pad with the front surface facing away from the die pad. The semiconductor die is electrically coupled to the electrically conductive leads. A package molding material is molded over the semiconductor die arranged on the die pad. A stress absorbing material contained within a cavity delimited by a peripheral wall on the front surface of the semiconductor die is positioned intermediate at least one selected portion of the front surface of the semiconductor die and the package molding material.