Electrically erasable and programmable memory comprising an internal supply voltage management device
    1.
    发明申请
    Electrically erasable and programmable memory comprising an internal supply voltage management device 有权
    电可擦除可编程存储器,包括内部电源电压管理装置

    公开(公告)号:US20030223289A1

    公开(公告)日:2003-12-04

    申请号:US10420533

    申请日:2003-04-22

    CPC classification number: G11C16/30

    Abstract: An electrically erasable and programmable memory includes an array of memory cells, and a distribution line linked to a receiving terminal of an external supply voltage and to a booster circuit. The distribution line provides an internal supply voltage. The distribution line is also linked to the receiving terminal through a diode or a diode circuit simulating operation of a diode. The memory includes a regulator for triggering the booster circuit when the internal supply voltage becomes lower than a threshold so as to maintain the internal supply voltage close to the threshold when the external supply voltage is too low, at least during the reading of memory cells. The diode or the diode circuit is blocked when the external supply voltage is too low.

    Abstract translation: 电可擦除和可编程存储器包括存储器单元的阵列,以及连接到外部电源电压的接收端的分配线和升压电路。 配电线路提供内部电源电压。 分配线还通过模拟二极管的操作的二极管或二极管电路与接收端相连。 存储器包括用于当内部电源电压变得低于阈值时触发升压电路的稳压器,以便至少在读取存储器单元期间,当外部电源电压太低时,内部电源电压保持接近阈值。 当外部电源电压太低时,二极管或二极管电路被阻塞。

    Supply voltage comparator
    2.
    发明申请

    公开(公告)号:US20040032243A1

    公开(公告)日:2004-02-19

    申请号:US10420342

    申请日:2003-04-22

    CPC classification number: G11C16/30 G05F3/262 G11C5/143 G11C5/147 H03K17/302

    Abstract: A comparator compares a first voltage applied to a first input to a second voltage applied to a second input. The comparator delivers an output signal having a first value when the second voltage is higher than the first voltage, and having a second value when the second voltage is lower than the first voltage. The comparator includes first and second PMOS transistors arranged as current mirrors. The first PMOS transistor has its source connected to the first input of the comparator for receiving the first voltage. The second PMOS transistor has its source connected to the second input of the comparator for receiving the second voltage. The output of the comparator is connected to the drain of one of the transistors.

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