公开(公告)号：US5989981A

公开(公告)日：1999-11-23

申请号：US886876

申请日：1997-07-02

申请人： Sadao Nakashima ,  Terukazu Ohno ,  Toshiaki Tsuchiya ,  Tetsushi Sakai ,  Shinji Nakamura ,  Takemi Ueki ,  Yuichi Kado ,  Tadao Takeda

发明人： Sadao Nakashima ,  Terukazu Ohno ,  Toshiaki Tsuchiya ,  Tetsushi Sakai ,  Shinji Nakamura ,  Takemi Ueki ,  Yuichi Kado ,  Tadao Takeda

IPC分类号： H01L21/265 ,  H01L21/322

CPC分类号： H01L21/3226 ,  H01L21/26533

摘要： A method of manufacturing an SOI substrate uses an SOI substrate having a first single-crystal silicon layer, an insulating layer formed on the first single-crystal silicon layer, and a second single-crystal silicon layer formed on the insulating layer. The surface of the second single-crystal silicon layer is thermally oxidized. The second single-crystal silicon layer is controlled to have a predetermined thickness by removing the thermally oxidized surface. This step controlling the second single-crystal silicon layer to have a predetermined thickness includes the step of eliminating, by annealing, a stacking fault formed by the thermal oxidation.

摘要翻译： 制造SOI衬底的方法使用具有第一单晶硅层，形成在第一单晶硅层上的绝缘层和形成在绝缘层上的第二单晶硅层的SOI衬底。 第二单晶硅层的表面被热氧化。 通过去除热氧化表面，将第二单晶硅层控制为具有预定的厚度。 控制第二单晶硅层具有预定厚度的步骤包括通过退火消除由热氧化形成的堆垛层错的步骤。

公开(公告)号：US20100156565A1

公开(公告)日：2010-06-24

申请号：US12066317

申请日：2006-07-05

申请人： Shuichi Oka ,  Terukazu Ohno

发明人： Shuichi Oka ,  Terukazu Ohno

IPC分类号： H03H9/15

CPC分类号： H03H9/132 ,  H03H9/02102 ,  H03H9/02118 ,  H03H9/02133 ,  H03H9/173

摘要： An object is to provide a film bulk acoustic resonator capable of improving resonant characteristics by reducing the generation of a standing wave to be caused by a transverse-mode acoustic wave to a minimum. In a film bulk acoustic resonator including a resonant portion A having a piezoelectric material layer 3 sandwiched between a first electrode 2 and a second electrode 4, the resonant portion A is configured to have a planar shape that is an ellipse having a part thereof cut off along a straight line L. The straight line L intersects at least one of a minor axis and a major axis of the ellipse, and preferably intersects both the minor axis and the major axis, and passes through the center of the ellipse.

摘要翻译： 本发明的目的是提供一种能够通过将由横模式的声波引起的驻波的产生降低到最小来提高谐振特性的膜体声波谐振器。 在包括夹在第一电极2和第二电极4之间的具有压电体层3的谐振部分A的薄膜体声波谐振器中，谐振部分A被构造成具有截面的椭圆形的平面形状 直线L与椭圆的短轴和长轴中的至少一个相交，并且优选地与短轴和长轴相交，并且穿过椭圆的中心。

公开(公告)号：US07889027B2

公开(公告)日：2011-02-15

申请号：US12066317

申请日：2006-07-05

申请人： Shuichi Oka ,  Terukazu Ohno

发明人： Shuichi Oka ,  Terukazu Ohno

IPC分类号： H03H9/13 ,  H03H9/17 ,  H03H9/54

CPC分类号： H03H9/132 ,  H03H9/02102 ,  H03H9/02118 ,  H03H9/02133 ,  H03H9/173

摘要： An object is to provide a film bulk acoustic resonator capable of improving resonant characteristics by reducing the generation of a standing wave to be caused by a transverse-mode acoustic wave to a minimum. In a film bulk acoustic resonator including a resonant portion A having a piezoelectric material layer 3 sandwiched between a first electrode 2 and a second electrode 4, the resonant portion A is configured to have a planar shape that is an ellipse having a part thereof cut off along a straight line L. The straight line L intersects at least one of a minor axis and a major axis of the ellipse, and preferably intersects both the minor axis and the major axis, and passes through the center of the ellipse.

摘要翻译： 本发明的目的是提供一种能够通过将由横模式的声波引起的驻波的产生降低到最小来提高谐振特性的膜体声波谐振器。 在包括夹在第一电极2和第二电极4之间的具有压电体层3的谐振部分A的薄膜体声波谐振器中，谐振部分A被构造成具有截面的椭圆形的平面形状 直线L与椭圆的短轴和长轴中的至少一个相交，并且优选地与短轴和长轴相交，并且穿过椭圆的中心。

公开(公告)号：US07781861B2

公开(公告)日：2010-08-24

申请号：US10550796

申请日：2004-03-30

申请人： Hideki Mori ,  Hirokazu Ejiri ,  Kenji Azami ,  Terukazu Ohno ,  Nobuyuki Yoshitake

发明人： Hideki Mori ,  Hirokazu Ejiri ,  Kenji Azami ,  Terukazu Ohno ,  Nobuyuki Yoshitake

IPC分类号： H01L23/62

CPC分类号： H01L23/5256 ,  H01L2924/0002 ,  H01L2924/00

摘要： By stably separating a melting location of a fuse (3) from conductive layers (5A, 5B), reliable melting of the fuse (3) is enabled. A fuse (3) including a fuse body (3A) and two pads (3Ba, 3Bb) connected by this and two conductive layers (5A, 5B) individually connected to the two pads (3Ba, 3Bb) are formed in a multilayer structure on a semiconductor substrate (1). A length of the fuse body (3A) is defined so that the melting location of the fuse (3) becomes positioned in the fuse body (3A) away from the region overlapped on the conductive layer (5A or 5B) when an electrical stress is applied between two conductive layers (5A, 5B) and the fuse (3) is melted.

摘要翻译： 通过将熔丝（3）的熔融位置与导电层（5A，5B）稳定分离，可以使熔丝（3）熔化可靠。 包括熔丝本体（3A）的熔丝（3）和由其连接的两个焊盘（3Ba，3Bb）和分别连接到两个焊盘（3Ba，3Bb）的两个导电层（5A，5B）形成在多层结构中 半导体衬底（1）。 保险丝体（3A）的长度被限定为使得当电压应力为电压时，熔断器（3）的熔化位置位于熔断体（3A）中，远离重叠在导电层（5A或5B）上的区域 施加在两个导电层（5A，5B）和熔丝（3）之间的熔化。

公开(公告)号：US20060263986A1

公开(公告)日：2006-11-23

申请号：US10550796

申请日：2004-03-30

申请人： Hideki Mori ,  Hirokazu Ejiri ,  Kenji Azami ,  Terukazu Ohno ,  Nobuyuki Yoshitake

发明人： Hideki Mori ,  Hirokazu Ejiri ,  Kenji Azami ,  Terukazu Ohno ,  Nobuyuki Yoshitake

IPC分类号： H01L27/10 ,  H01L21/336

CPC分类号： H01L23/5256 ,  H01L2924/0002 ,  H01L2924/00

摘要： By stably separating a melting location of a fuse (3) from conductive layers (5A, 5B), reliable melting of the fuse (3) is enabled. A fuse (3) including a fuse body (3A) and two pads (3Ba, 3Bb) connected by this and two conductive layers (5A, 5B) individually connected to the two pads (3Ba, 3Bb) are formed in a multilayer structure on a semiconductor substrate (1). A length of the fuse body (3A) is defined so that the melting location of the fuse (3) becomes positioned in the fuse body (3A) away from the region overlapped on the conductive layer (5A or 5B) when an electrical stress is applied between two conductive layers (5A, 5B) and the fuse (3) is melted.

摘要翻译： 通过将熔丝（3）的熔融位置与导电层（5A，5B）稳定分离，可以使熔丝（3）熔化可靠。 包括熔断器体（3A）和与其连接的两个焊盘（3Ba，3Bb）和分别连接到两个焊盘（3Ba，3Bb）的两个导电层（5A，5B）的保险丝（3） 形成在半导体衬底（1）上的多层结构中。 熔丝本体（3A）的长度被限定为使熔断体（3）的熔化位置位于与导体层（5A或5B）上重叠的区域远离熔丝体（3A）中，当熔融体 在两个导电层（5A，5B）之间施加电应力并且熔丝（3）熔化。