DISPLAY DEVICE AND METHOD OF DRIVING THE SAME

    公开(公告)号:US20210125541A1

    公开(公告)日:2021-04-29

    申请号:US16894157

    申请日:2020-06-05

    Abstract: A display device includes a display panel including gate lines, data lines, and pixels; a gate driver that provides gate signals to the pixels through the gate lines; a data driver that provides data signals to the pixels through the data lines; and a timing controller that obtains pre-charging gray scale values based on gray scale values of the pixels. The gate driver simultaneously supplies the gate signals to the gate lines in a first period, and sequentially supplies the gate signals to the gate lines in a second period. The data driver supplies data signals corresponding to the pre-charging gray scale values to the data lines in the first period, and supplies data signals corresponding to the gray scale values of the pixels to the data lines in the second period.

    DISPLAY DEVICE AND METHOD OF DRIVING THE SAME

    公开(公告)号:US20210065634A1

    公开(公告)日:2021-03-04

    申请号:US16889683

    申请日:2020-06-01

    Abstract: A display device may extract an edge of a data signal based on the data signal and phase conversion clock signals, extract a phase of the data signal based on the edge, and generate a clock phase calibration signal based on the phase of the data signal. The display device may calibrate a phase of a clock signal using the clock phase calibration signal that has a phase corresponding to the phase of the clock signal, thereby improving transmission characteristic of the signal.

    DISPLAY DEVICE HAVING SCAN SIGNALS WITH ADJUSTABLE PULSE WIDTHS

    公开(公告)号:US20220084469A1

    公开(公告)日:2022-03-17

    申请号:US17318289

    申请日:2021-05-12

    Abstract: A display device includes a display panel including scan lines, first signal lines connected to the scan lines in a first pixel block, second signal lines connected to the scan lines in a second pixel block, third signal lines connected to the scan lines in a third pixel block; a first scan driver supplying a first output signal to the first signal lines based on a first sub-clock signal; a second scan driver supplying a second output signal to the second signal lines based on a second sub-clock signal; a third scan driver supplying a third output signal to the third signal lines based on and a third sub-clock signal; and a timing controller. Changes in pulse widths of the first to third output signals are different in one frame period.

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