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公开(公告)号：US20240194146A1
公开(公告)日：2024-06-13
申请号：US18347489
申请日：2023-07-05
发明人： Dong Woo KIM , Kee Chan PARK , Yi Kyoung YOU , Chong Chul CHAI , Kyung Ho KIM , Joon Ho LEE
IPC分类号： G09G3/3266 , G09G3/3233
CPC分类号： G09G3/3266 , G09G3/3233 , G09G2300/0819 , G09G2300/0842 , G09G2310/0286 , G09G2310/08
摘要： A scan signal driver includes: stages to sequentially output scan signals in an active period, and to selectively output sensing signals in a vertical blank period. At least one of the stages includes: a sensing control circuit to supply a gate-on voltage to a sensing control node in response to a holding control signal during the active period, and to output the gate-on voltage of the sensing control node in response to a selectively input line select signal during the vertical blank period; an output node control circuit to supply the gate-on voltage to a pull-up node when the gate-on voltage of the sensing control node is output during the vertical blank period; and an output circuit to output a scan clock signal as a sensing signal to one of scan signal lines when the gate-on voltage is supplied to the pull-up node during the vertical blank period.
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公开(公告)号：US20210118375A1
公开(公告)日：2021-04-22
申请号：US17075472
申请日：2020-10-20
发明人： Tae Hoon YANG , Joon Ho LEE , Kee Chan PARK , Ki Bum KIM , Hyang A. PARK , Jong Chan LEE , Woong Hee JEONG
IPC分类号： G09G3/3266 , G09G3/20
摘要： A display device includes: a plurality of pixels, each of which is connected to a corresponding one of a plurality of scan lines, and a scan driver including a plurality of stages, each of which supplies a scan signal to a corresponding one of the scan lines, each of the stages includes: a node controller which supplies a second output signal of a previous stage to a first node based on an input signal of a first clock terminal or a first output signal of the previous stage, a first inverter connected between the first node and a second node, a buffer which supplies a voltage of the second node to a first output terminal based on an input signal of a second clock terminal, and a second inverter connected between the first output terminal and a second output terminal.
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公开(公告)号：US20220358878A1
公开(公告)日：2022-11-10
申请号：US17695588
申请日：2022-03-15
发明人： DONGWOO KIM , Joon Ho LEE , Kee Chan PARK , MINKYU WOO , CHONGCHUL CHAI
IPC分类号： G09G3/3225
摘要： A display apparatus is disclosed, which includes a pixel. The pixel includes first through fifth transistors and a light emitting element. The first transistor includes a control electrode electrically connected to a first node, an input electrode that receives a first power voltage and an output electrode electrically connected to the light emitting element. The second transistor includes a control electrode that receives a scan signal, an input electrode that receives a grayscale data voltage and an output electrode electrically connected to a second node. The third transistor includes a control electrode electrically connected to the second node, an input electrode that receives a reference voltage and an output electrode electrically connected to the first node. The fourth transistor includes a control electrode that receives the scan signal, an input electrode that receives a bias data voltage and an output electrode electrically connected to the first node. The fifth transistor includes a control electrode that receives a sensing control signal, an input electrode that receives an initialization voltage and an output electrode electrically connected to the light emitting element.
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公开(公告)号：US20220020332A1
公开(公告)日：2022-01-20
申请号：US17296001
申请日：2019-09-26
发明人： Tae Hoon YANG , Joon Ho LEE , Kee Chan PARK , Ki Bum KIM , Jong Chan LEE , Woong Hee JEONG
IPC分类号： G09G3/3266 , G09G3/3233
摘要： A scan driver includes stage circuits, wherein each of the stage circuits includes a first transistor, wherein a first electrode thereof is coupled to a first node, a second electrode thereof is coupled to an input carry line, and a gate electrode thereof is coupled to a first clock line; and a capacitor, wherein a first electrode thereof is coupled to the first node and a second electrode thereof is coupled to a second node, wherein the second node is coupled to an output carry line, and the second node is selectively coupled to one of a first power voltage line and a second power voltage line.
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公开(公告)号：US20210012708A1
公开(公告)日：2021-01-14
申请号：US16876910
申请日：2020-05-18
发明人： Tae Hoon YANG , Joon Ho LEE , Kee Chan PARK , Ki Bum KIM , Jong Chan LEE , Woong Hee JEONG
IPC分类号： G09G3/3225
摘要： An emission signal driver comprises stages connected to emission lines. Each of the stages includes a node controller which supplies a start signal or a carry signal, which is input to a start terminal, to a first node in response to a clock signal input to a clock terminal, a first inverter connected between the first node and a second node, and a second inverter connected between the second node and an output terminal.
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