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公开(公告)号：US20240221676A1
公开(公告)日：2024-07-04
申请号：US18236862
申请日：2023-08-22
发明人： Kyung Ho KIM , Yi Kyoung YOU , Kee Chan PARK , Sang Yong NO , Gi Chang LEE
IPC分类号： G09G3/3266 , G09G3/3233
CPC分类号： G09G3/3266 , G09G3/3233 , G09G2310/08 , G09G2330/028
摘要： A scan signal driver includes: a plurality of stages configured to be driven by dividing a first frame period into a display period and a sensing period, and to sequentially output scan signals at the display period, wherein each of the plurality of stages comprises: an output control circuit; and a memory control circuit, wherein the scan driver is configured to: irregularly set a specific stage of the plurality of stages at a display period every frame; control the specific stage to: store a voltage by using the memory control circuit; and output a sensing signal by using the stored voltage at a sensing period, and the memory control circuit includes: a second memory transistor configured to electrically connect an M node with an I node; and a third memory transistor configured to electrically connect the output control circuit with the I node.
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公开(公告)号：US20210118375A1
公开(公告)日：2021-04-22
申请号：US17075472
申请日：2020-10-20
发明人： Tae Hoon YANG , Joon Ho LEE , Kee Chan PARK , Ki Bum KIM , Hyang A. PARK , Jong Chan LEE , Woong Hee JEONG
IPC分类号： G09G3/3266 , G09G3/20
摘要： A display device includes: a plurality of pixels, each of which is connected to a corresponding one of a plurality of scan lines, and a scan driver including a plurality of stages, each of which supplies a scan signal to a corresponding one of the scan lines, each of the stages includes: a node controller which supplies a second output signal of a previous stage to a first node based on an input signal of a first clock terminal or a first output signal of the previous stage, a first inverter connected between the first node and a second node, a buffer which supplies a voltage of the second node to a first output terminal based on an input signal of a second clock terminal, and a second inverter connected between the first output terminal and a second output terminal.
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公开(公告)号：US20240194146A1
公开(公告)日：2024-06-13
申请号：US18347489
申请日：2023-07-05
发明人： Dong Woo KIM , Kee Chan PARK , Yi Kyoung YOU , Chong Chul CHAI , Kyung Ho KIM , Joon Ho LEE
IPC分类号： G09G3/3266 , G09G3/3233
CPC分类号： G09G3/3266 , G09G3/3233 , G09G2300/0819 , G09G2300/0842 , G09G2310/0286 , G09G2310/08
摘要： A scan signal driver includes: stages to sequentially output scan signals in an active period, and to selectively output sensing signals in a vertical blank period. At least one of the stages includes: a sensing control circuit to supply a gate-on voltage to a sensing control node in response to a holding control signal during the active period, and to output the gate-on voltage of the sensing control node in response to a selectively input line select signal during the vertical blank period; an output node control circuit to supply the gate-on voltage to a pull-up node when the gate-on voltage of the sensing control node is output during the vertical blank period; and an output circuit to output a scan clock signal as a sensing signal to one of scan signal lines when the gate-on voltage is supplied to the pull-up node during the vertical blank period.
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公开(公告)号：US20220358878A1
公开(公告)日：2022-11-10
申请号：US17695588
申请日：2022-03-15
发明人： DONGWOO KIM , Joon Ho LEE , Kee Chan PARK , MINKYU WOO , CHONGCHUL CHAI
IPC分类号： G09G3/3225
摘要： A display apparatus is disclosed, which includes a pixel. The pixel includes first through fifth transistors and a light emitting element. The first transistor includes a control electrode electrically connected to a first node, an input electrode that receives a first power voltage and an output electrode electrically connected to the light emitting element. The second transistor includes a control electrode that receives a scan signal, an input electrode that receives a grayscale data voltage and an output electrode electrically connected to a second node. The third transistor includes a control electrode electrically connected to the second node, an input electrode that receives a reference voltage and an output electrode electrically connected to the first node. The fourth transistor includes a control electrode that receives the scan signal, an input electrode that receives a bias data voltage and an output electrode electrically connected to the first node. The fifth transistor includes a control electrode that receives a sensing control signal, an input electrode that receives an initialization voltage and an output electrode electrically connected to the light emitting element.
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公开(公告)号：US20220020332A1
公开(公告)日：2022-01-20
申请号：US17296001
申请日：2019-09-26
发明人： Tae Hoon YANG , Joon Ho LEE , Kee Chan PARK , Ki Bum KIM , Jong Chan LEE , Woong Hee JEONG
IPC分类号： G09G3/3266 , G09G3/3233
摘要： A scan driver includes stage circuits, wherein each of the stage circuits includes a first transistor, wherein a first electrode thereof is coupled to a first node, a second electrode thereof is coupled to an input carry line, and a gate electrode thereof is coupled to a first clock line; and a capacitor, wherein a first electrode thereof is coupled to the first node and a second electrode thereof is coupled to a second node, wherein the second node is coupled to an output carry line, and the second node is selectively coupled to one of a first power voltage line and a second power voltage line.
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公开(公告)号：US20210012708A1
公开(公告)日：2021-01-14
申请号：US16876910
申请日：2020-05-18
发明人： Tae Hoon YANG , Joon Ho LEE , Kee Chan PARK , Ki Bum KIM , Jong Chan LEE , Woong Hee JEONG
IPC分类号： G09G3/3225
摘要： An emission signal driver comprises stages connected to emission lines. Each of the stages includes a node controller which supplies a start signal or a carry signal, which is input to a start terminal, to a first node in response to a clock signal input to a clock terminal, a first inverter connected between the first node and a second node, and a second inverter connected between the second node and an output terminal.
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公开(公告)号：US20140035621A1
公开(公告)日：2014-02-06
申请号：US14049800
申请日：2013-10-09
申请人： Konkuk University Industrial Cooperation Corp , ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
发明人： Sang Hee PARK , Chi Sun HWANG , Sung MIN Yoon , Him Chan OH , Kee Chan PARK , Tao REN , Hong Kyun LEEM , Min Woo OH , Ji Sun KIM , Jae Eun PI , Byeong Hoon KIM , Byoung Gon YU
IPC分类号： H03K3/012
CPC分类号： H03K3/012 , H03K19/094 , H03K19/20
摘要： Disclosed are an inverter, a NAND gate, and a NOR gate. The inverter includes: a pull-up unit constituted by a second thin film transistor outputting a first power voltage to an output terminal according to a voltage applied to a gate; a pull-down unit constituted by a fifth thin film transistor outputting a ground voltage to the output terminal according to an input signal applied to a gate; and a pull-up driver applying a second power voltage or the ground voltage to the gate of the second thin film transistor according to the input signal.
摘要翻译： 公开了一种逆变器，NAND门和NOR门。 逆变器包括：上拉单元，由根据施加到栅极的电压向输出端子输出第一电源电压的第二薄膜晶体管构成; 根据施加到门的输入信号，将由接地电压输出到输出端的第五薄膜晶体管构成的下拉单元; 以及根据输入信号将第二电源电压或接地电压施加到第二薄膜晶体管的栅极的上拉驱动器。
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公开(公告)号：US20130088285A1
公开(公告)日：2013-04-11
申请号：US13633654
申请日：2012-10-02
发明人： Jae Eun PI , Kee Chan PARK , Hong Kyun LEEM , Joon Dong KIM , Youn Kyung KIM , Ji Sun KIM , Byoung Gon YU , Sang Hee PARK , Him Chan OH , Min Ki RYU , Chi Sun HWANG
CPC分类号： H02M3/073 , G09G3/3696 , H02M2003/077
摘要： Disclosed is a DC voltage conversion circuit of a liquid crystal display apparatus, including: a main pumping circuit including a plurality of thin film transistors and configured to output voltage for driving a liquid crystal display apparatus when the plurality of thin film transistors are alternately turned on or off; and a switch control signal generator configured to control voltages applied to gates of the plurality of thin film transistors by inversion of a clock signal, in which each thin film transistor is turned on when positive gate-source voltage is applied thereto, and turned off when negative gate-source voltage is applied thereto.
摘要翻译： 公开了一种液晶显示装置的DC电压转换电路，包括：主泵浦电路，其包括多个薄膜晶体管，并且被配置为当多个薄膜晶体管交替接通时输出用于驱动液晶显示装置的电压 或关闭 以及开关控制信号发生器，其被配置为通过反转时钟信号来控制施加到所述多个薄膜晶体管的栅极的电压，其中当施加正栅极 - 源极电压时每个薄膜晶体管导通，并且当所述晶体管的栅极 - 向其施加负栅极 - 源极电压。
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