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公开(公告)号:US10437109B2
公开(公告)日:2019-10-08
申请号:US15287823
申请日:2016-10-07
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor: Kyungho Kim , Hyukjin Kim , Donghyeon Ki , Byoungsun Na
IPC: G02F1/1339 , G02F1/1333 , G02F1/1362 , G02F1/1368 , H01L27/12 , H01L29/786
Abstract: A display device includes: a base substrate, on which first and second light blocking areas extending in first and second directions, respectively, and a pixel area are defined; a gate line above the base substrate in the first light blocking area; a data line above the base substrate in the second light blocking area; thin film transistors connected to the gate and data lines; a color filters above the base substrate in the pixel area, where the color filters have an island shape; a step-difference compensation portion above thin film transistors; a pixel electrode above the color filter in the pixel area; a black matrix above the step-difference compensation portion in the first light blocking area; and main and sub column spacers protruding from the black matrix and spaced apart from each other. The main column spacer overlaps the step-difference compensation portion.
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公开(公告)号:US09985053B2
公开(公告)日:2018-05-29
申请号:US15054884
申请日:2016-02-26
Applicant: Samsung Display Co., Ltd.
Inventor: Kyungho Kim , Donghyeon Ki , Kiwon Park , Donghee Shin
CPC classification number: H01L27/124 , G02F1/1345 , G02F1/136259 , H01L27/1248
Abstract: An array substrate and a display apparatus including the array substrate. The array substrate includes: a plurality of signal lines aligned in a display area of the array substrate; a plurality of signal pads aligned in a non-display area of the array substrate; a plurality of fan-out lines aligned in the non-display area and respectively connected to the signal lines and the signal pads; a plurality of auxiliary lines respectively overlapping and insulated from the fan-out lines; and a plurality of connection lines connecting in parallel at least two of the auxiliary lines that are adjacent to each other.
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公开(公告)号:US12080248B2
公开(公告)日:2024-09-03
申请号:US17317035
申请日:2021-05-11
Applicant: Samsung Display Co., Ltd.
Inventor: Dong Hee Shin , Sunkwun Son , Nahyeon Cha , Donghyeon Ki
IPC: G09G3/3291
CPC classification number: G09G3/3291 , G09G2310/0272
Abstract: A display apparatus includes a display panel, a data driving circuit and a gate driving circuit. The display panel displays an image and includes a plurality of pixels. The data driving circuit applies a data voltage to a data line of the display panel. The gate driving circuit applies a gate output signal to a gate line of the display panel. The gate driving circuit is disposed between opening portions in a display area of the display panel. The gate driving circuit includes a normal stage column extending in a pixel column direction of the display panel and including a plurality of normal stages and a dummy stage column disposed adjacent to an end portion of the normal stage column in a pixel row direction and including a plurality of dummy stages.
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公开(公告)号:US20240135870A1
公开(公告)日:2024-04-25
申请号:US18391747
申请日:2023-12-21
Applicant: Samsung Display Co., Ltd.
Inventor: Donghee Shin , Donghyeon Ki , Sunkwun Son , Nahyeon Cha
IPC: G09G3/3225 , G11C19/28
CPC classification number: G09G3/3225 , G11C19/28 , G09G2300/0443 , G09G2310/0286
Abstract: Provided is a display apparatus in which an area of a dead space is significantly reduced, the display apparatus including a first scan line extending in a first direction, a second scan line spaced apart from the first scan line and extending in the first direction, a first pixel set disposed between the first scan line and the second scan line, the first pixel set including a 1-1st pixel including n sub-pixels and a 1-2nd pixel including n sub-pixels, and n first data lines spaced apart from each other, disposed between the 1-1st pixel and the 1-2nd pixel in a plan view, extending in a second direction crossing the first direction, and electrically connected to the 1-1st pixel and the 1-2nd pixel.
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公开(公告)号:US11887534B2
公开(公告)日:2024-01-30
申请号:US17314941
申请日:2021-05-07
Applicant: Samsung Display Co., Ltd.
Inventor: Donghee Shin , Donghyeon Ki , Sunkwun Son , Nahyeon Cha
IPC: G09G3/36 , G02F1/1362 , G09G3/20 , H01L27/12 , G11C19/28 , G09G3/3225
CPC classification number: G09G3/3225 , G11C19/28 , G09G2300/0443 , G09G2310/0286
Abstract: Provided is a display apparatus in which an area of a dead space is significantly reduced, the display apparatus including a first scan line extending in a first direction, a second scan line spaced apart from the first scan line and extending in the first direction, a first pixel set disposed between the first scan line and the second scan line, the first pixel set including a 1-1st pixel including n sub-pixels and a 1-2nd pixel including n sub-pixels, and n first data lines spaced apart from each other, disposed between the 1-1st pixel and the 1-2nd pixel in a plan view, extending in a second direction crossing the first direction, and electrically connected to the 1-1st pixel and the 1-2nd pixel.
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公开(公告)号:US20230255075A1
公开(公告)日:2023-08-10
申请号:US17967757
申请日:2022-10-17
Applicant: Samsung Display Co., Ltd.
Inventor: Sunkwang Kim , Donghyeon Ki , Hyungjin Song , Dongyoon Lee , Seongyoung Lee
CPC classification number: H01L27/3279 , H01L51/56 , H01L2227/323
Abstract: A display apparatus includes a substrate including a data line extending in a first direction, a voltage line extending in the first direction, and a first circuit disposed in a non-display area and electrically connected to the data line and the voltage line, wherein the first circuit includes a thin-film transistor including a semiconductor layer and a gate electrode overlapping a semiconductor layer, where one side of the semiconductor layer is electrically connected to the data line and another side is electrically connected to the voltage line, a first capacitor including a first lower electrode not overlapping the semiconductor layer and a first upper electrode on the first lower electrode, and a second capacitor including a second lower electrode not overlapping the semiconductor layer and a second upper electrode on the second lower electrode, and the gate electrode is at a same layer as the data line and the voltage line.
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公开(公告)号:US20220130328A1
公开(公告)日:2022-04-28
申请号:US17314941
申请日:2021-05-07
Applicant: Samsung Display Co., Ltd.
Inventor: Donghee Shin , Donghyeon Ki , Sunkwun Son , Nahyeon Cha
IPC: G09G3/3225 , G11C19/28
Abstract: Provided is a display apparatus in which an area of a dead space is significantly reduced, the display apparatus including a first scan line extending in a first direction, a second scan line spaced apart from the first scan line and extending in the first direction, a first pixel set disposed between the first scan line and the second scan line, the first pixel set including a 1-1st pixel including n sub-pixels and a 1-2nd pixel including n sub-pixels, and n first data lines spaced apart from each other, disposed between the 1-1st pixel and the 1-2nd pixel in a plan view, extending in a second direction crossing the first direction, and electrically connected to the 1-1st pixel and the 1-2nd pixel.
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公开(公告)号:US20170047347A1
公开(公告)日:2017-02-16
申请号:US15054884
申请日:2016-02-26
Applicant: Samsung Display Co., Ltd.
Inventor: Kyungho KIM , Donghyeon Ki , Kiwon Park , Donghee Shin
IPC: H01L27/12
CPC classification number: H01L27/124 , G02F1/1345 , G02F1/136259 , H01L27/1248
Abstract: An array substrate and a display apparatus including the array substrate. The array substrate includes: a plurality of signal lines aligned in a display area of the array substrate; a plurality of signal pads aligned in a non-display area of the array substrate; a plurality of fan-out lines aligned in the non-display area and respectively connected to the signal lines and the signal pads; a plurality of auxiliary lines respectively overlapping and insulated from the fan-out lines; and a plurality of connection lines connecting in parallel at least two of the auxiliary lines that are adjacent to each other.
Abstract translation: 阵列基板和包括阵列基板的显示装置。 阵列基板包括:在阵列基板的显示区域中排列的多条信号线; 在阵列基板的非显示区域中排列的多个信号焊盘; 在非显示区域中排列并分别连接到信号线和信号垫的多个扇出线; 分别与扇出线重叠并绝缘的多条辅助线; 以及并联连接彼此相邻的至少两条辅助线的多条连接线。
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