公开(公告)号：US10459565B2

公开(公告)日：2019-10-29

申请号：US15262940

申请日：2016-09-12

Applicant: Samsung Display Co., Ltd

Inventor： Mi Sun Lee ,  Hong Jo Park

IPC: G02F1/1343 ,  G02F1/1362 ,  H01L27/12 ,  G06F3/044 ,  G06F3/041 ,  G02F1/1333 ,  G02F1/1368

Abstract: A display device includes a plurality of gate lines; a plurality of data lines; a plurality of thin film transistors each connected to one of the gate lines and one of the data lines; a plurality of pixels each including a first electrode and a second electrode insulated from the first electrode and connected to one of the thin film transistors, the pixels arranged in a plurality of pixel rows and a plurality of pixel columns; and a plurality of sensing lines connected to the first electrodes. The gate lines include front gate lines and rear gate lines arranged at a front and a rear of each of the respective pixel rows, and a rear gate line of a front pixel row and a front gate line of a rear pixel row are arranged between adjacent pixel rows, and two pixel columns are arranged between adjacent data lines.

公开(公告)号：US11243424B2

公开(公告)日：2022-02-08

申请号：US16666309

申请日：2019-10-28

Applicant: Samsung Display Co., Ltd.

Inventor： Mi Sun Lee ,  Hong Jo Park

IPC: G02F1/1333 ,  H01L27/12 ,  G06F3/044 ,  G02F1/1343 ,  G02F1/1362 ,  G06F3/041 ,  G02F1/1368

Abstract: A display device includes a plurality of gate lines; a plurality of data lines; a plurality of thin film transistors each connected to one of the gate lines and one of the data lines; a plurality of pixels each including a first electrode and a second electrode insulated from the first electrode and connected to one of the thin film transistors, the pixels arranged in a plurality of pixel rows and a plurality of pixel columns; and a plurality of sensing lines connected to the first electrodes. The gate lines include front gate lines and rear gate lines arranged at a front and a rear of each of the respective pixel rows, and a rear gate line of a front pixel row and a front gate line of a rear pixel row are arranged between adjacent pixel rows, and two pixel columns are arranged between adjacent data lines.

公开(公告)号：US11281038B2

公开(公告)日：2022-03-22

申请号：US16666309

申请日：2019-10-28

Applicant: Samsung Display Co., Ltd.

Inventor： Mi Sun Lee ,  Hong Jo Park

IPC: G02F1/1333 ,  H01L27/12 ,  G06F3/044 ,  G02F1/1343 ,  G02F1/1362 ,  G06F3/041 ,  G02F1/1368

Abstract: A display device includes a plurality of gate lines; a plurality of data lines; a plurality of thin film transistors each connected to one of the gate lines and one of the data lines; a plurality of pixels each including a first electrode and a second electrode insulated from the first electrode and connected to one of the thin film transistors, the pixels arranged in a plurality of pixel rows and a plurality of pixel columns; and a plurality of sensing lines connected to the first electrodes. The gate lines include front gate lines and rear gate lines arranged at a front and a rear of each of the respective pixel rows, and a rear gate line of a front pixel row and a front gate line of a rear pixel row are arranged between adjacent pixel rows, and two pixel columns are arranged between adjacent data lines.

公开(公告)号：US11269433B2

公开(公告)日：2022-03-08

申请号：US16821803

申请日：2020-03-17

Applicant: Samsung Display Co., Ltd.

Inventor： Young Gu Kang ,  Yang Hee Kim ,  Hong Jo Park ,  Su Jin Lee ,  Jong Hwan Lee ,  Hyun Hwan Choi

IPC: G06F3/041 ,  H01L27/12 ,  G02F1/1333 ,  G02F1/1343 ,  G02F1/1362

Abstract: A display device includes a display element including a first electrode, a protective layer arranged on the first electrode, a second electrode arranged on the protective layer at a pixel area and contacting a thin film transistor. A sensing line is arranged on the protective layer and contacts the first electrode through a contact hole exposing the first electrode through the third protective layer. The sensing line comprises a first conductive layer arranged on the protective layer and contacting the second electrode through the contact hole, and a second conductive layer arranged on the first conductive layer.