公开(公告)号：US10459565B2

公开(公告)日：2019-10-29

申请号：US15262940

申请日：2016-09-12

Applicant: Samsung Display Co., Ltd

Inventor： Mi Sun Lee ,  Hong Jo Park

IPC: G02F1/1343 ,  G02F1/1362 ,  H01L27/12 ,  G06F3/044 ,  G06F3/041 ,  G02F1/1333 ,  G02F1/1368

Abstract: A display device includes a plurality of gate lines; a plurality of data lines; a plurality of thin film transistors each connected to one of the gate lines and one of the data lines; a plurality of pixels each including a first electrode and a second electrode insulated from the first electrode and connected to one of the thin film transistors, the pixels arranged in a plurality of pixel rows and a plurality of pixel columns; and a plurality of sensing lines connected to the first electrodes. The gate lines include front gate lines and rear gate lines arranged at a front and a rear of each of the respective pixel rows, and a rear gate line of a front pixel row and a front gate line of a rear pixel row are arranged between adjacent pixel rows, and two pixel columns are arranged between adjacent data lines.

公开(公告)号：US11243424B2

公开(公告)日：2022-02-08

申请号：US16666309

申请日：2019-10-28

Applicant: Samsung Display Co., Ltd.

Inventor： Mi Sun Lee ,  Hong Jo Park

IPC: G02F1/1333 ,  H01L27/12 ,  G06F3/044 ,  G02F1/1343 ,  G02F1/1362 ,  G06F3/041 ,  G02F1/1368

Abstract: A display device includes a plurality of gate lines; a plurality of data lines; a plurality of thin film transistors each connected to one of the gate lines and one of the data lines; a plurality of pixels each including a first electrode and a second electrode insulated from the first electrode and connected to one of the thin film transistors, the pixels arranged in a plurality of pixel rows and a plurality of pixel columns; and a plurality of sensing lines connected to the first electrodes. The gate lines include front gate lines and rear gate lines arranged at a front and a rear of each of the respective pixel rows, and a rear gate line of a front pixel row and a front gate line of a rear pixel row are arranged between adjacent pixel rows, and two pixel columns are arranged between adjacent data lines.

公开(公告)号：US08988644B2

公开(公告)日：2015-03-24

申请号：US13829801

申请日：2013-03-14

Applicant: Samsung Display Co., Ltd.

Inventor： Mi Sun Lee

IPC: G09G3/36 ,  G02F1/1343 ,  G02F1/1362

CPC classification number: G02F1/134336 ,  G02F1/134309 ,  G02F1/136286 ,  G02F2001/134372 ,  G02F2201/121

Abstract: A liquid crystal display has its common electrode and pixel electrodes formed on a same substrate where the substrate further includes a plurality of common voltage transmitting lines disposed under both of the common electrode and the pixel electrodes and forming a ladder-like network connected to the common electrode at multiple connection locations for providing the common voltage to the common electrode by way of conduction paths having substantially lower resistivity than the common electrode, whereby an RC delay factor of transmitting the common voltage is reduced.

Abstract translation: 液晶显示器具有形成在同一衬底上的公共电极和像素电极，其中衬底还包括设置在公共电极和像素电极两侧的多个公共电压传输线，并形成连接到公共端的梯形网络 电极，用于通过具有比公共电极具有基本上更低的电阻率的传导路径将公共电压提供给公共电极，由此减小了传输公共电压的RC延迟因子。

公开(公告)号：US11281038B2

公开(公告)日：2022-03-22

申请号：US16666309

申请日：2019-10-28

Applicant: Samsung Display Co., Ltd.

Inventor： Mi Sun Lee ,  Hong Jo Park

IPC: G02F1/1333 ,  H01L27/12 ,  G06F3/044 ,  G02F1/1343 ,  G02F1/1362 ,  G06F3/041 ,  G02F1/1368

Abstract: A display device includes a plurality of gate lines; a plurality of data lines; a plurality of thin film transistors each connected to one of the gate lines and one of the data lines; a plurality of pixels each including a first electrode and a second electrode insulated from the first electrode and connected to one of the thin film transistors, the pixels arranged in a plurality of pixel rows and a plurality of pixel columns; and a plurality of sensing lines connected to the first electrodes. The gate lines include front gate lines and rear gate lines arranged at a front and a rear of each of the respective pixel rows, and a rear gate line of a front pixel row and a front gate line of a rear pixel row are arranged between adjacent pixel rows, and two pixel columns are arranged between adjacent data lines.