公开(公告)号：US12144234B2

公开(公告)日：2024-11-12

申请号：US17958301

申请日：2022-09-30

Applicant: Samsung Display Co., Ltd.

Inventor： Sewan Son ,  Moo Soon Ko ,  Ji Ryun Park ,  Jin Sung An ,  Min Woo Woo ,  Seong Jun Lee ,  Wang Woo Lee ,  Jeong-Soo Lee ,  Ji Seon Lee ,  Deuk Myung Ji

IPC: H10K59/88 ,  H10K59/12

Abstract: A display device comprises a substrate including display and peripheral areas, a semiconductor element, a pixel structure, and a plurality of dummy patterns. The semiconductor element is disposed in the display area on the substrate, and the pixel structure is disposed on the semiconductor element. The dummy patterns which have stacked structure are disposed in the peripheral area on the substrate, and contain a material identical to a material constituting the semiconductor element. The dummy patterns are arranged in a grid shape in different layers, and each of the dummy patterns includes a central portion and an edge portion surrounding the central portion. The edge portions of dummy patterns which are adjacent to each other in the different layers among the dummy patterns are overlapped each other in a direction from the substrate to the pixel structure.

公开(公告)号：US11733748B2

公开(公告)日：2023-08-22

申请号：US17897669

申请日：2022-08-29

Applicant: Samsung Display Co., LTD.

Inventor： Jihye Kong ,  Jeong-Soo Lee

IPC: G06F1/18 ,  G09G3/3275

CPC classification number: G06F1/189 ,  G09G3/3275 ,  G09G2300/0426

Abstract: A display device includes a plurality of pixels and an upper signal line providing a data signal to the pixels. The upper signal line includes a first upper signal line including a first metal material, a second upper signal line including a second metal material which is different from the first metal material, and a third upper signal line including the first metal material. The first, second and third upper signal lines are arranged in order and respectively electrically connected to a plurality of connection lines including the second metal material. The connection lines are connected to a plurality of lower signal lines.

公开(公告)号：US11594179B2

公开(公告)日：2023-02-28

申请号：US17684188

申请日：2022-03-01

Applicant: Samsung Display Co., Ltd.

Inventor： Seong Min Wang ,  Jihye Kong ,  Yongho Yang ,  Jeong-Soo Lee

IPC: G09G3/3233 ,  G09G3/20 ,  G09G3/3266 ,  G09G3/3291

Abstract: A pixel circuit includes a light-emitting element, a first transistor, a second transistor operating based on a first gate signal, a third transistor operating based on a second gate signal, a fourth transistor operating based on an initialization control signal, a fifth transistor operating based on an emission control signal, a sixth transistor operating based on the emission control signal, a seventh transistor, of which one terminal is connected to the light-emitting element, operating based on a bias control signal, an eighth transistor, of which one terminal is connected to the driving transistor, operating based on the bias control signal, a storage capacitor, and the light-emitting element. The circuit performs a display-scan operation where a driving time of a panel driving frame is a predetermined duration, and performs a display-scan operation and a self-scan operation where the driving time is longer than the predetermined duration.

公开(公告)号：US11011438B2

公开(公告)日：2021-05-18

申请号：US16277414

申请日：2019-02-15

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Moo Soon Ko ,  Jeong-Soo Lee ,  Jung Hwa Kim

IPC: H01L21/66 ,  H01L27/12 ,  G09G3/3233 ,  G09G3/00 ,  H01L29/786 ,  H01L27/32

Abstract: A display device is disclosed. In one aspect, the display device includes a display area configured to display an image, a peripheral area neighboring the display area, and at least one test element group (TEG) including a test thin film transistor (TFT) formed in the peripheral area and a plurality of test pads electrically connected to the test TFT. The display device also includes first to third dummy circuits separated from the test TFT, each of the first to third dummy circuits including a plurality of first dummy semiconductor layers and a plurality of first dummy gate electrodes overlapping at least a portion of the first dummy semiconductor layers in the depth dimension of the display device.

公开(公告)号：US20190088731A1

公开(公告)日：2019-03-21

申请号：US16058392

申请日：2018-08-08

Applicant: Samsung Display Co., Ltd.

Inventor： Jeong-Soo Lee ,  Moo Soon Ko ,  Min Woo Woo ,  Ju-Won Yoon ,  Deuk Myung Ji

IPC: H01L27/32 ,  H01L29/786 ,  G09G3/3258

Abstract: A display device includes a plurality of pixels. Each pixel includes a first transistor including a first gate electrode, a first source region, and a first drain region, a second transistor connected to the first source region of the first transistor, a third transistor connected to the first gate electrode and the first drain region of the first transistor, a fifth transistor connected to the first source region of the first transistor, and a sixth transistor connected to the first drain region of the first transistor. The pixels include a first pixel and a second pixel disposed adjacent to each other. The first and second pixels share a fourth transistor connected to the third transistor of the first pixel and the third transistor of the second pixel, and share a seventh transistor connected to the sixth transistor of the first pixel and the sixth transistor of the second pixel.

公开(公告)号：US12080611B2

公开(公告)日：2024-09-03

申请号：US17321980

申请日：2021-05-17

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Moo Soon Ko ,  Jeong-Soo Lee ,  Jung Hwa Kim

IPC: H01L21/66 ,  G09G3/00 ,  G09G3/3233 ,  H01L27/12 ,  H01L29/786 ,  H10K59/12 ,  H10K59/88

CPC classification number: H01L22/34 ,  G09G3/006 ,  G09G3/3233 ,  H01L27/1237 ,  H01L27/1248 ,  H01L27/1255 ,  H01L29/786 ,  G09G2300/0413 ,  G09G2300/0426 ,  G09G2310/0232 ,  H10K59/12 ,  H10K59/1201 ,  H10K59/88

Abstract: A display device is disclosed. In one aspect, the display device includes a display area configured to display an image, a peripheral area neighboring the display area, and at least one test element group (TEG) including a test thin film transistor (TFT) formed in the peripheral area and a plurality of test pads electrically connected to the test TFT. The display device also includes first to third dummy circuits separated from the test TFT, each of the first to third dummy circuits including a plurality of first dummy semiconductor layers and a plurality of first dummy gate electrodes overlapping at least a portion of the first dummy semiconductor layers in the depth dimension of the display device.

公开(公告)号：US11581390B2

公开(公告)日：2023-02-14

申请号：US17143284

申请日：2021-01-07

Applicant: Samsung Display Co., LTD.

Inventor： Jin Sung An ,  Young Woo Park ,  Se Wan Son ,  Moo Soon Ko ,  Jeong-Soo Lee ,  Ji Seon Lee ,  Deuk Myung Ji

IPC: H01L27/32 ,  H01L51/56 ,  G09G3/3275 ,  H01L51/52 ,  G09G3/3266

Abstract: A display device including: a substrate; an active layer, and including channel and conductive regions; a first conductive layer including a driving gate electrode and a scan line in a first direction; a second conductive layer including a storage line; a third conductive layer including a first connecting member above the storage line; an insulating layer between the storage line and the first connecting member; and a data line and a driving voltage line crossing the scan line in a second direction, wherein the first connecting member electrically connects the driving gate electrode and a conductive region, the driving voltage line overlaps the first connecting member, the insulating layer includes first and second sub-insulating layers, and an edge of the second sub-insulating layer substantially overlaps an edge of the first connecting member in a thickness direction of the display device.

公开(公告)号：US11481008B2

公开(公告)日：2022-10-25

申请号：US17206385

申请日：2021-03-19

Applicant: Samsung Display Co., LTD.

Inventor： Jihye Kong ,  Jeong-Soo Lee

IPC: G06F1/18 ,  G09G3/3275

Abstract: A display device includes a plurality of pixels and an upper signal line providing a data signal to the pixels. The upper signal line includes a first upper signal line including a first metal material, a second upper signal line including a second metal material which is different from the first metal material, and a third upper signal line including the first metal material. The first, second and third upper signal lines are arranged in order and respectively electrically connected to a plurality of connection lines including the second metal material. The connection lines are connected to a plurality of lower signal lines.

公开(公告)号：US11373597B2

公开(公告)日：2022-06-28

申请号：US17168061

申请日：2021-02-04

Applicant: Samsung Display Co., Ltd.

Inventor： Seong Min Wang ,  Ji Hye Kong ,  Yong Ho Yang ,  Jeong-Soo Lee

IPC: G09G3/3233 ,  G09G3/3258 ,  G09G3/3291 ,  G09G3/3266

Abstract: A display device includes a display panel, a driving circuit, and a power supply. The driving circuit is connected to a plurality of pixels of the display panel through a plurality of scan line sets and a plurality of data lines, provides a plurality of scan signals to the display panel, and provides data voltages to the plurality of data lines. The power supply applies one or more power voltages to the plurality of pixels. The driving circuit enables at least two scan signals of the plurality of scan signals during a non-emission interval, partially overlapping the at least two scan signals during at least two consecutive horizontal periods.

公开(公告)号：US10886349B2

公开(公告)日：2021-01-05

申请号：US16058392

申请日：2018-08-08

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Jeong-Soo Lee ,  Moo Soon Ko ,  Min Woo Woo ,  Ju-Won Yoon ,  Deuk Myung Ji

IPC: H01L27/32 ,  H01L27/12 ,  H01L29/786 ,  G09G3/3258 ,  G09G3/3233

Abstract: A display device includes a plurality of pixels. Each pixel includes a first transistor including a first gate electrode, a first source region, and a first drain region, a second transistor connected to the first source region of the first transistor, a third transistor connected to the first gate electrode and the first drain region of the first transistor, a fifth transistor connected to the first source region of the first transistor, and a sixth transistor connected to the first drain region of the first transistor. The pixels include a first pixel and a second pixel disposed adjacent to each other. The first and second pixels share a fourth transistor connected to the third transistor of the first pixel and the third transistor of the second pixel, and share a seventh transistor connected to the sixth transistor of the first pixel and the sixth transistor of the second pixel.