Abstract:
A display device includes a plurality of pixels. Each pixel includes a first transistor including a first gate electrode, a first source region, and a first drain region, a second transistor connected to the first source region of the first transistor, a third transistor connected to the first gate electrode and the first drain region of the first transistor, a fifth transistor connected to the first source region of the first transistor, and a sixth transistor connected to the first drain region of the first transistor. The pixels include a first pixel and a second pixel disposed adjacent to each other. The first and second pixels share a fourth transistor connected to the third transistor of the first pixel and the third transistor of the second pixel, and share a seventh transistor connected to the sixth transistor of the first pixel and the sixth transistor of the second pixel.
Abstract:
A thin film transistor array substrate includes a plurality of pixels, each of the pixels including a capacitor comprising a first electrode, and a second electrode located above the first electrode, a data line extending in a first direction, configured to provide a data signal, located above the capacitor, and overlapping a part of the capacitor, and a driving voltage line configured to supply a driving voltage, located between the capacitor and the data line, and comprising a first line extending in the first direction, and a second line extending in a second direction substantially perpendicular to the first direction.
Abstract:
A display apparatus includes a display panel, a thin film transistor including a control electrode disposed on a surface of the display panel, a semiconductor pattern overlapping with the control electrode in a plan view, an input electrode connected to a portion of the semiconductor pattern, and an output electrode connected to another portion of the semiconductor pattern, a first insulating layer disposed between the control electrode and the semiconductor pattern, a second insulating layer covering the input electrode and the output electrode, and a sensing electrode disposed between the display panel and the second insulating layer.
Abstract:
A display device includes a plurality of pixels. Each pixel includes a first transistor including a first gate electrode, a first source region, and a first drain region, a second transistor connected to the first source region of the first transistor, a third transistor connected to the first gate electrode and the first drain region of the first transistor, a fifth transistor connected to the first source region of the first transistor, and a sixth transistor connected to the first drain region of the first transistor. The pixels include a first pixel and a second pixel disposed adjacent to each other. The first and second pixels share a fourth transistor connected to the third transistor of the first pixel and the third transistor of the second pixel, and share a seventh transistor connected to the sixth transistor of the first pixel and the sixth transistor of the second pixel.
Abstract:
An organic light emitting diode display includes: a substrate; a substrate insulating layer on the substrate; a capacitor on the substrate insulating layer; a driving thin film transistor including a driving gate electrode connected to the capacitor; and an organic light emitting element connected to the driving thin film transistor, where the capacitor includes: a first capacitor electrode on the substrate insulating layer; a second capacitor electrode on the first capacitor electrode; a capacitor insulating layer between the first capacitor electrode and the second capacitor electrode and contacting the first capacitor electrode and the second capacitor electrode, the capacitor insulating layer having a higher dielectric constant than the substrate insulating layer; and an auxiliary electrode contacting at least one of the first capacitor electrode or the second capacitor electrode.
Abstract:
An organic light-emitting diode (OLED) display is disclosed. In one aspect, the OLED display includes a plurality of pixels. Each of the pixels includes a first insulating layer and first and second signal lines spaced apart from each other. At least a portion of the first and second signal lines is formed over the first insulating layer. Each pixel also includes a second insulating layer interposed between the first and second signal lines. The second insulating layer has a lower permittivity that the first insulating layer.
Abstract:
A thin film transistor array substrate includes a plurality of pixels, each of the pixels including a capacitor comprising a first electrode, and a second electrode located above the first electrode, a data line extending in a first direction, configured to provide a data signal, located above the capacitor, and overlapping a part of the capacitor, and a driving voltage line configured to supply a driving voltage, located between the capacitor and the data line, and comprising a first line extending in the first direction, and a second line extending in a second direction substantially perpendicular to the first direction.
Abstract:
A method of manufacturing a thin film transistor (TFT) array substrate is disclosed. In one aspect, the method includes forming an active layer on a substrate, forming a first insulating layer on the substrate to cover the active layer, and forming a first gate electrode on the first insulating layer in an area corresponding to the active layer, doping the active layer with ion impurities, forming a second insulating layer on the first insulating layer to cover the first gate electrode, performing an annealing process on the active layer, forming a lower electrode of a capacitor on the second insulating layer, forming a third insulating layer on the second insulating layer to cover the lower electrode, wherein the third insulating layer has a dielectric constant that is greater than those of the first and second insulating layers, and forming an upper electrode of the capacitor on the third insulating layer.
Abstract:
A pixel circuit includes an OLED, a first transistor including a gate electrode connected to a first node and an electrode connected to a third node, a capacitor including a first electrode for receiving a power supply voltage and a second electrode connected to the first node, a third transistor including a gate electrode for receiving a first gate signal, a first electrode connected to the first node, and a second electrode connected to the third node, a fourth transistor including a gate electrode for receiving a second gate signal, a first electrode connected to the first node, and a second electrode and a second gate electrode for receiving a first initialization voltage, and a seventh transistor including a gate electrode for receiving a third gate signal, a first electrode for receiving a second initialization voltage, and a second electrode connected to an anode electrode of the OLED.
Abstract:
A backplane for a flat panel display apparatus, includes: a thin film transistor (TFT) on a substrate and including an active layer, a gate electrode, a source electrode, and a drain electrode; a light-blocking layer between the substrate and the TFT; a first insulating layer between the light-blocking layer and the TFT; a capacitor including a first electrode on the same plane as the light-blocking layer, and a second electrode on the first electrode, wherein the first insulating layer is between the first electrode and the second electrode; and a pixel electrode on the same plane as the light-blocking layer.