公开(公告)号：US20220397932A1

公开(公告)日：2022-12-15

申请号：US17704334

申请日：2022-03-25

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Jun Dal KIM ,  Dong Won PARK ,  Hyun Su KIM ,  Kyung Youl MIN ,  Jong Man BAE ,  Jun Yong SONG ,  Tae Young JIN

IPC: G06F1/10 ,  G06F13/42 ,  G06F13/40

Abstract: A data receiver, which communicates with a data transmitter through a plurality of lanes, includes: a first reception unit which receives first data through a first lane; a second reception unit which receives second data through a second lane; and a detector which compares the first data and the second data to detect a skew between the first lane and the second lane. The first reception unit includes a first clock data recovery unit which recovers a first clock and first payload data from the first data. The first reception unit controls a loop speed of the first clock data recovery unit based on a skew level of the skew.

公开(公告)号：US20210173437A1

公开(公告)日：2021-06-10

申请号：US16935041

申请日：2020-07-21

Applicant: Samsung Display Co., Ltd.

Inventor： Jong Man BAE ,  Jong Hwa KIM ,  Se Hun PARK ,  Chang Mo PARK ,  So Yeon JOO

IPC: G06F1/16 ,  G06F3/041

Abstract: A foldable display device and a method of driving the foldable display device are provided. The foldable display device may include a first region, a second region, and a third region configured to bend along a folding axis between the first region and the second region. The foldable display device may include a display panel having a plurality of pixels; a touch sensor overlapping the third region and on an upper surface of the display panel; a first digitizer provided under the display panel to overlap the first region; and a second digitizer provided under the display panel to overlap the second region.

公开(公告)号：US20230327845A1

公开(公告)日：2023-10-12

申请号：US18208127

申请日：2023-06-09

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Hyun Su KIM ,  Dong Won PARK ,  Jun Dal KIM ,  Kyung Youl MIN ,  Jong Man BAE ,  Jun Yong SONG ,  Tae Young JIN

IPC: H04L7/00

CPC classification number: H04L7/0037

Abstract: A transceiver includes a transmitter and a receiver connected to each other through a first line and a second line. The transmitter transmits signals having a first voltage range to the first line and the second line in a first mode, and transmits signals having a second voltage range less than the first voltage range to the first line and the second line in a second mode. In transmitting a (1−1)-th payload to the receiver, the transmitter is sequentially driven in the first mode, the second mode, and the first mode, and transmits a first clock training pattern and the (1−1)-th payload in the second mode. The receiver includes a clock data recovery circuit generating a first clock signal corresponding to the received first clock training pattern and a register storing first frequency information and first phase information of the first clock training pattern.

公开(公告)号：US20220416841A1

公开(公告)日：2022-12-29

申请号：US17576169

申请日：2022-01-14

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Tae Young JIN ,  Dong Won PARK ,  Jun Dal KIM ,  Hyun Su KIM ,  Kyung Youl MIN ,  Jong Man BAE ,  Jun Yong SONG

IPC: H04B1/7156 ,  H04L7/00 ,  H04B1/38 ,  G09G3/20

Abstract: A transceiver device includes a transmitter and a receiver connected through first and second lines. A first frame period includes an active period for transmitting a first payload and a vertical blank period including a frequency hopping period. The transmitter transmits, to the first and second lines, signals having a first voltage range in a first mode and signals having a second voltage range in a second mode. The transmitter generates a first horizontal synchronization signal in the second mode except for the frequency hopping period, encodes the first horizontal synchronization signal to horizontal synchronization data, and generates a second horizontal synchronization signal in the first mode in the frequency hopping period. The transmitter adds a first clock training pattern to the horizontal synchronization data except for the frequency hopping period, and adds a second clock training pattern to first horizontal synchronization data after the frequency hopping period.

公开(公告)号：US20230170997A1

公开(公告)日：2023-06-01

申请号：US17959471

申请日：2022-10-04

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Dong Won PARK ,  Jun Dal KIM ,  Hyun Su KIM ,  Jong Man BAE ,  Jun Yong SONG ,  Tae Young JIN

IPC: H04B10/40 ,  H04B1/16 ,  H04B1/04 ,  G06F1/04 ,  H04B10/516

CPC classification number: H04B10/40 ,  H04B1/16 ,  H04B1/04 ,  G06F1/04 ,  H04B10/516

Abstract: A transceiver includes a transmitter and a receiver which are connected to each other through a first line and a second line. The transmitter transmits a first clock training pattern to the receiver in a first period, transmits a second clock training pattern and a first first payload to the receiver in a second period, and transmits a third clock training pattern and a second first payload to the receiver in a third period. The first clock training pattern, the second clock training pattern, and the third clock training pattern are variable based on a plurality of driving modes.

公开(公告)号：US20230163763A1

公开(公告)日：2023-05-25

申请号：US17825622

申请日：2022-05-26

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Jong Man BAE ,  Hyun Su KIM ,  Jun Dal KIM ,  Dong Won PARK ,  Young Suk JUNG

IPC: H03K19/0175 ,  H03K7/02 ,  H03K9/02

CPC classification number: H03K19/017545 ,  H03K7/02 ,  H03K9/02

Abstract: A transceiver includes a transmitter and a receiver coupled to each other through a first line and a second line. The transmitter transmits a first voltage signal of a second logic level or a fourth logic level, among a first logic level, the second logic level, a third logic level, and the fourth logic level, through the first line. The transmitter transmits a second voltage signal of the first logic level or the third logic level through the second line. The receiver generates an output signal having one of four values based on the first voltage signal and the second voltage signal.

公开(公告)号：US20220399986A1

公开(公告)日：2022-12-15

申请号：US17574860

申请日：2022-01-13

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Hyun Su KIM ,  Dong Won PARK ,  Jun Dal KIM ,  Kyung Youl MIN ,  Jong Man BAE ,  Jun Yong SONG ,  Tae Young JIN

IPC: H04L7/00

Abstract: A transceiver includes a transmitter and a receiver connected to each other through a first line and a second line. The transmitter transmits signals having a first voltage range to the first line and the second line in a first mode, and transmits signals having a second voltage range less than the first voltage range to the first line and the second line in a second mode. In transmitting a (1-1)-th payload to the receiver, the transmitter is sequentially driven in the first mode, the second mode, and the first mode, and transmits a first clock training pattern and the (1-1)-th payload in the second mode. The receiver includes a clock data recovery circuit generating a first clock signal corresponding to the received first clock training pattern and a register storing first frequency information and first phase information of the first clock training pattern.

公开(公告)号：US20220397931A1

公开(公告)日：2022-12-15

申请号：US17574077

申请日：2022-01-12

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Jun Yong SONG ,  Jong Man BAE ,  Jun Dal KIM ,  Hyun Su KIM ,  Kyung Youl MIN ,  Dong Won PARK ,  Tae Young JIN

IPC: G06F1/08 ,  G06F1/10

Abstract: A transceiver includes a transmitter and a receiver connected to each other by a first line and a second line. The transmitter transmits signals having a first voltage range to the first line and the second line in a first mode, and transmits signals having a second voltage range smaller than the first voltage range to the first line and the second line in a second mode. The transmitter encodes an original payload in the second mode to generate a first payload, and transmits the clock training pattern and the first payload through the first line and the second line.

公开(公告)号：US20230318860A1

公开(公告)日：2023-10-05

申请号：US18128323

申请日：2023-03-30

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Tae Young JIN ,  Jun Dal KIM ,  Hyun Su KIM ,  Kyung Youl MIN ,  Dong Won PARK ,  Jong Man BAE

IPC: H04L12/12 ,  H04L25/49

CPC classification number: H04L12/12 ,  H04L25/4917

Abstract: A transmitter includes a transmission controller which outputs original data through an original data lane, an encoder which encodes the original data into encoded data and outputs the encoded data through an encoded data lane, and a transmission driver which outputs the encoded data at a speed of M (M is a real number greater than 0) gigabits per second through a transmission and reception interface. The transmission driver provides a first clock signal corresponding to an output speed to the encoder, the encoder provides a second clock signal having a second frequency less than a first frequency of the first clock signal to the transmission controller, the transmission controller outputs the original data based on the second clock signal, and the encoder outputs the encoded data based on the first clock signal.

公开(公告)号：US20230318654A1

公开(公告)日：2023-10-05

申请号：US17973960

申请日：2022-10-26

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Jun Yong SONG ,  Hyun Su KIM ,  Dong Won PARK ,  Jong Man BAE

IPC: H04B1/40 ,  H04L7/04

CPC classification number: H04B1/40 ,  H04L7/04

Abstract: A transceiver device includes a transmitter and a receiver connected to each other through a first line and a second line. The transmitter transmits signals having a first voltage range to the first line and the second line in a first mode, and transmits signals having a second voltage range less than the first voltage range to the first line and the second line in a second mode. The transmitter encodes an original payload to generate a first payload in the second mode, and transmits a clock training pattern and the first payload through the first line and the second line. The receiver decodes the first payload and outputs reception data corresponding to the original payload in the second mode.