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公开(公告)号:US12106720B2
公开(公告)日:2024-10-01
申请号:US17863519
申请日:2022-07-13
发明人: Hyojin Lee , Woomi Bae , Hui Nam , Jinyoung Roh , Sehyuk Park , Jaekeun Lim
IPC分类号: G09G3/3266
CPC分类号: G09G3/3266 , G09G2320/0247 , G09G2320/0271 , G09G2360/14
摘要: A display device includes a display panel including a plurality of pixel rows, and a panel driver which drives the display panel. The panel driver determines whether input image data represents a still image. When the input image data represents the still image, the panel driver determines a flicker value of the still image, applies a compensation value corresponding to a carry shift interval to the flicker value, determines a driving frequency for the display panel based on the flicker value to which the compensation value is applied, and performs an alternate driving operation for the display panel at the driving frequency.
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公开(公告)号:US11908413B2
公开(公告)日:2024-02-20
申请号:US17257265
申请日:2019-06-21
发明人: Hyo-Jin Lee , Sehyuk Park
IPC分类号: G09G3/3258 , G09G3/3233 , G09G3/3291
CPC分类号: G09G3/3258 , G09G3/3291 , G09G2300/0819 , G09G2320/0247 , G09G2330/028
摘要: A display device includes a display panel and a display panel driver. The display panel includes a pixel having a switching element of a first type and a switching element of a second type different from the first type. The display panel driver drives the display panel. In a first mode, the display panel driver drives the switching element of the first type and the switching element of the second type with a high driving frequency. In a second mode, the display panel driver drives the switching element of the first type with the high driving frequency and the switching element of the second type with low driving frequency which is lower than the high driving frequency. In a third mode, the display panel driver drives the switching element of the first type and the switching element of the second type with the low driving frequency.
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3.
公开(公告)号:US11869439B2
公开(公告)日:2024-01-09
申请号:US17717997
申请日:2022-04-11
发明人: Sehyuk Park , Hongsoo Kim , Jinyoung Roh , Bonghyun You , Hyojin Lee , Jaekeun Lim
IPC分类号: G09G3/3266 , G09G3/3275
CPC分类号: G09G3/3266 , G09G3/3275 , G09G2310/04 , G09G2320/0247 , G09G2320/103 , G09G2330/023 , G09G2330/028
摘要: A display apparatus includes a display panel, a gate driver, a data driver, a driving controller and a power voltage generator. The display panel displays an image based on input image data. The gate driver outputs a gate signal to a gate line. The data driver outputs a data voltage to a data line. The driving controller drives display areas of the display panel in different driving frequencies. The power voltage generator outputs a data power voltage to the data driver. The driving controller outputs an output data enable signal including a writing period having an active signal and a holding period having an inactive signal for the respective display areas. The power voltage generator generates the data power voltage having a high power voltage level during the writing period and a low power voltage level in at least a portion of the holding period.
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公开(公告)号:US11756469B2
公开(公告)日:2023-09-12
申请号:US17903423
申请日:2022-09-06
发明人: Sehyuk Park , Hongsoo Kim , Jaekeun Lim , Jinyoung Roh , Hyojin Lee
IPC分类号: G09G3/20
CPC分类号: G09G3/20 , G09G2310/08 , G09G2320/0209
摘要: A display device includes a display panel including a first display region and a second display region surrounding the first display region, where a first pixel having a first size is disposed in the first display region, and a second pixel having a second size is disposed in the second display region, a gate driver which applies a gate signal to a gate line, a data driver which applies a data voltage to a data line, and a timing controller which controls the gate driver and the data driver. The gate line includes a first gate line connected to both the first pixel and the second pixel, and a second gate line connected only to the second pixel. The data line includes a first data line which does not transmit the data voltage to the second pixel connected to the second gate line, and a second data line which transmits the data voltage to the second pixel connected to the second gate line.
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公开(公告)号:US11670218B2
公开(公告)日:2023-06-06
申请号:US17518617
申请日:2021-11-04
发明人: Jiyoun Kim , Hongsoo Kim , Sehyuk Park , Junheyung Jung , Manseung Cho
IPC分类号: G09G3/20
CPC分类号: G09G3/2092 , G09G2310/027 , G09G2310/0286 , G09G2310/0291
摘要: A data driver for providing data voltages to a display panel includes a digital-to-analog converting block, an option storing block, a data swap block and an output buffer block. The digital-to-analog converting block converts line data into the data voltages. The option storing block stores a pixel arrangement option representing a pixel arrangement structure of the display panel. The data swap block is connected to the digital-to-analog converting block and the option storing block, and selectively performs a data swap operation that swaps the data voltages based on the pixel arrangement option and whether the line data are odd line data or even line data. The output buffer block is connected to the data swap block and outputs the data voltages on which the data swap operation is selectively performed to data lines.
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公开(公告)号:US11468853B2
公开(公告)日:2022-10-11
申请号:US17389466
申请日:2021-07-30
发明人: Jinyoung Roh , Hongsoo Kim , Sehyuk Park , Hyojin Lee , Jaekeun Lim
IPC分类号: G09G3/3291 , G09G3/3266 , G09G3/3233
摘要: A gate driver includes a first stage, a second stage, a third stage and a fourth stage. The first stage includes a first clock terminal receiving a first clock signal, a second clock terminal receiving a second clock signal, a carry terminal receiving a vertical start signal and an output terminal outputting a first gate output signal. The second stage includes a first clock terminal receiving the second clock signal, a second clock terminal receiving the first clock signal, a carry terminal receiving the vertical start signal and an output terminal outputting a second gate output signal. The third stage includes a first clock terminal receiving the second clock signal, a second clock terminal receiving the first clock signal, a carry terminal receiving the first gate output signal and an output terminal outputting a third gate output signal.
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公开(公告)号:US11462170B2
公开(公告)日:2022-10-04
申请号:US17008366
申请日:2020-08-31
发明人: Jae Keun Lim , Jin Young Roh , Sehyuk Park , Hyo Jin Lee
IPC分类号: G09G3/3266 , G11C19/18 , G09G3/3258 , G09G3/3275 , G09G3/36 , G09G3/3233 , G11C19/28
摘要: A scan driver includes: a plurality of first stages configured to sequentially output a plurality of intermediate scan signals based on a scan start signal; a plurality of masking transistors respectively connected to a plurality of output terminals of the plurality of first stages, and configured to selectively transfer the plurality of intermediate scan signals in response to a masking signal, respectively; and a plurality of second stages including a plurality of input terminals respectively connected to the plurality of masking transistors, and configured to selectively output a plurality of scan signals based on the plurality of intermediate scan signals selectively transferred by the plurality of masking transistors.
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8.
公开(公告)号:US11244633B2
公开(公告)日:2022-02-08
申请号:US16920322
申请日:2020-07-02
发明人: Sehyuk Park , Sangan Kwon , HongSoo Kim , Jinyoung Roh , Hyo Jin Lee
IPC分类号: G09G3/3291
摘要: A method of driving a display panel includes dividing an input image into a plurality of segments, generating a flicker value of a segment of the plurality of segments, determining whether to compensate the flicker value of the segment or not according to a segment size, compensating the flicker value of the segment based on the segment size, determining a frame rate of the display panel based on the flicker value of the segment and outputting a data voltage to the display panel in the frame rate. The flicker value of the segment is compensated based on the flicker value of the segment and flicker values of segments that are adjacent to the segment.
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公开(公告)号:US11238810B2
公开(公告)日:2022-02-01
申请号:US16923477
申请日:2020-07-08
发明人: HongSoo Kim , Sangan Kwon , Jinyoung Roh , Sehyuk Park , Sukhun Lee , Hyojin Lee
IPC分类号: G09G3/3266 , G09G3/3275
摘要: A display apparatus includes a display panel, a gate driver, a data driver and a driving controller. The display panel displays an image based on input image data. The gate driver outputs a gate signal to a gate line of the display panel. The data driver outputs a data voltage to a data line of the display panel. The driving controller controls operations of the gate driver and the data driver and drive a still image display area and a video image display area of a display area of the display panel in different driving frequencies. The driving controller includes a still image determiner which divides the input image data into a plurality of still image determining blocks, respectively determines whether the still image determining blocks represent a still image or a video image and determines a boundary between the still image display area and the video image display area.
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公开(公告)号:US11195465B2
公开(公告)日:2021-12-07
申请号:US16737363
申请日:2020-01-08
发明人: Hyojin Lee , Sehyuk Park , Jinyoung Roh , Geunjeong Park , Eunho Lee , Hui Nam , Bonghyun You
IPC分类号: G09G3/3258 , G09G3/3266 , G09G3/3275 , H01L27/12
摘要: A display device including: a display panel including a pixel connected to a first scan line, second scan line, and data line, the pixel including: a first switch connected to the first scan line; a second switch connected to the second scan line; and a light emitting element; a low-frequency driving controller to output a power control signal having a first level in a first mode and a second power control signal having a second level in a second mode; a scan driver including first and second scan drivers to drive the first and second scan lines, wherein one of the first and second scan drivers operates in the second mode; and a data driver to operate in the second mode in response to the power control signal having the second level, wherein the data driver operates at a frequency lower than a reference frequency in the second mode.
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