公开(公告)号：US20180284552A1

公开(公告)日：2018-10-04

申请号：US15883778

申请日：2018-01-30

Applicant: Samsung Display Co., Ltd.

Inventor： JOONGGUN CHONG ,  YONGHWAN SHIN ,  KWANGHO LEE

IPC: G02F1/1362 ,  H01L27/12

CPC classification number: G02F1/136286 ,  G02F1/136209 ,  G02F1/136277 ,  G02F2001/133302 ,  G02F2001/136222 ,  H01L27/124 ,  H01L27/1248

Abstract: A display substrate includes a base substrate, a gate electrode, a semiconductor layer, a source electrode, a drain electrode, a first black organic layer, a data line and a pixel electrode. The gate electrode is disposed on the base substrate. The semiconductor layer is disposed on the gate electrode. The source electrode is disposed on the semiconductor layer. The drain electrode is disposed on the semiconductor layer and is spaced apart from the source electrode. The first black organic layer is disposed on the source electrode and the drain electrode. The data line is disposed on the first black organic layer, and is electrically connected to the source electrode through a contact hole formed through the first black organic layer. The pixel electrode is electrically connected to the drain electrode. Thus, display quality of a display apparatus including the display substrate may be improved.

公开(公告)号：US20180284519A1

公开(公告)日：2018-10-04

申请号：US15870493

申请日：2018-01-12

Applicant: Samsung Display Co., Ltd.

Inventor： JOONGGUN CHONG ,  YONGHWAN SHIN ,  KWANGHO LEE

IPC: G02F1/1345 ,  H01L27/12 ,  G02F1/1335 ,  H01L21/02 ,  G02F1/1362 ,  G02F1/1343 ,  H01L21/768

CPC classification number: G02F1/13458 ,  G02F1/1335 ,  G02F1/134309 ,  G02F1/1362 ,  H01L21/02554 ,  H01L21/768 ,  H01L27/124 ,  H01L27/1248 ,  H01L27/1262

Abstract: A display substrate includes a base substrate, a gate metal pattern, a semiconductor layer, and a data metal pattern. The base substrate includes a display area and a peripheral area. The gate metal pattern includes a gate electrode of a transistor and includes a gate metal member disposed on the peripheral area. The transistor is disposed on the display area. The semiconductor layer includes a channel portion of the transistor and includes a semiconductor member disposed on the peripheral area. The data metal pattern includes a source electrode of the transistor and includes a data metal member disposed on the peripheral area, electrically connected to the gate metal member, and directly contacting the semiconductor member. A maximum thickness of the data metal member in a direction perpendicular to the base substrate is greater than a maximum thickness of the semiconductor member in the direction.