公开(公告)号：US20240063356A1

公开(公告)日：2024-02-22

申请号：US18342567

申请日：2023-06-27

Applicant: Samsung Display Co., LTD.

Inventor： Yun Yong NAM ,  So Young KOO ,  Eok Su KIM ,  Hyoung Do KIM ,  Hyung Jun KIM ,  Joon Seok PARK

IPC: H01L33/62 ,  H01L25/16

CPC classification number: H01L33/62 ,  H01L25/167

Abstract: A display device includes: a first electrode and a second electrode spaced from the first electrode; a first insulating layer on the first electrode and the second electrode; a plurality of light emitting elements on the first insulating layer and on the first electrode and the second electrode; a first connection electrode on the first electrode and contacting the plurality of light emitting elements; and a second connection electrode on the second electrode and contacting the plurality of light emitting elements, wherein each of the first electrode and the second electrode includes a first metal layer and a second metal layer on the first metal layer and including a different material from the first metal layer, a thickness of the first metal layer is between 100 Å to 300 Å, and a thickness of each of the first electrode and the second electrode is 2600 Å or less.

公开(公告)号：US20240234431A1

公开(公告)日：2024-07-11

申请号：US18610416

申请日：2024-03-20

Applicant: Samsung Display Co., LTD.

Inventor： Hyung Jun KIM ,  So Young KOO ,  Eok Su KIM ,  Yun Yong NAM ,  Jun Hyung LIM ,  Kyung Jin JEON

IPC: H01L27/12 ,  H01L29/786 ,  H10K59/12

CPC classification number: H01L27/1225 ,  H01L29/7869 ,  H01L29/78696 ,  H10K59/1201

Abstract: A display device according to an embodiment includes a light blocking layer disposed on a substrate; an oxygen supply layer disposed on and contacting the light blocking layer; a semiconductor layer disposed on the oxygen supply layer; and a light emitting diode electrically connected with the semiconductor layer. The semiconductor layer includes an oxide semiconductor, and the oxygen supply layer includes a metal oxide that includes at least one of indium, zinc, gallium, and tin.

公开(公告)号：US20230380228A1

公开(公告)日：2023-11-23

申请号：US18113200

申请日：2023-02-23

Applicant: Samsung Display Co., LTD.

Inventor： Hyung Jun KIM ,  Eok Su KIM ,  Hyoung Do KIM ,  Yun Yong NAM ,  Joon Seok PARK ,  Jun Hyung LIM

IPC: H10K59/131 ,  H10K59/12 ,  H10K59/80

CPC classification number: H10K59/131 ,  H10K59/1201 ,  H10K59/873

Abstract: A display device including a first substrate including a display area, and a non-display area, a second substrate on the first substrate, and a sealing member in a sealing area of the non-display area. The first substrate includes a first base portion, a first conductive layer including a first signal line and a lower light blocking layer, on the first base portion, a buffer layer on the first conductive layer, a semiconductor layer overlapping the lower light blocking layer, on the buffer layer, a gate insulating layer on the semiconductor layer, and a second conductive layer including second and third signal lines electrically connected to the first signal line, and a gate electrode overlapping the semiconductor layer, on the gate insulating layer. In plan view, the first signal line is between the second signal line and the third signal line. The first signal line overlaps the sealing member.

公开(公告)号：US20220140000A1

公开(公告)日：2022-05-05

申请号：US17471679

申请日：2021-09-10

Applicant: Samsung Display Co., LTD.

Inventor： Hyung Jun KIM ,  So Young KOO ,  Eok Su KIM ,  Yun Yong NAM ,  Jun Hyung LIM ,  Kyung Jin JEON

IPC: H01L27/15 ,  H01L33/24 ,  H01L33/38 ,  H01L33/44 ,  H01L33/60

Abstract: A display device includes first banks on a substrate and spaced apart from each other, a first electrode and a second electrode on the first banks and spaced apart from each other, a first insulating layer on the first electrode and the second electrode, and light emitting elements on the first insulating layer and each having ends on the first electrode and the second electrode. Each of the first banks includes a first pattern portion including concave portions and convex portions. The first pattern portions of the first banks are disposed on side surfaces of the first banks. The side surfaces are spaced apart and face each other. Each of the first electrode and the second electrode includes a second pattern portion on the first pattern portion and having a pattern shape corresponding to the first pattern portion on a surface thereof.

公开(公告)号：US20240049544A1

公开(公告)日：2024-02-08

申请号：US18297052

申请日：2023-04-07

Applicant: Samsung Display Co., LTD.

Inventor： Joon Seok PARK ,  JONGDO KEUM ,  Hyoung Do KIM ,  Yun Yong NAM ,  Chul Won PARK ,  Kilim HAN

IPC: H10K59/131 ,  H10K59/12 ,  H10K59/124

CPC classification number: H10K59/1315 ,  H10K59/1201 ,  H10K59/124

Abstract: A display device includes: a substrate; a conductive pattern layer disposed on the substrate; a buffer layer disposed on the conductive pattern layer; an active pattern layer disposed on the buffer layer and including a channel region and a conductive region adjacent to the channel region; an insulating pattern layer disposed on the channel region; an oxide pattern layer disposed on the insulating pattern layer; a gate electrode disposed on the oxide pattern layer; and a connecting member electrically connected to the conductive pattern layer and the conductive region. The connecting member and the oxide pattern layer include a same material.

公开(公告)号：US20230127261A1

公开(公告)日：2023-04-27

申请号：US17860593

申请日：2022-07-08

Applicant: Samsung Display Co., LTD.

Inventor： Hyung Jun KIM ,  So Young KOO ,  Eok Su KIM ,  Yun Yong NAM ,  Jun Hyung LIM ,  Kyung Jin JEON

IPC: H01L27/12 ,  H01L25/16

Abstract: A display device includes a first conductive layer including a first voltage line and a second voltage line, a buffer layer, a semiconductor layer including a first active layer and a second active layer, a first gate insulating layer, a second conductive layer including a first gate electrode overlapping the first active layer and a second gate electrode overlapping the second active layer, a passivation layer, a via layer, a bank pattern layer including a first bank pattern and a second bank pattern partially spaced apart from each other, a third conductive layer including a first electrode and a second electrode spaced apart from each other, and light emitting elements. The passivation layer includes silicon nitride (SiNx), and a ratio of a number of silicon-hydrogen bonds (Si—H) to a number of nitrogen-hydrogen bonds (N—H) in the silicon nitride (SiNx) is in a range of about 1:0.6 to about 1:1.5.

公开(公告)号：US20220173128A1

公开(公告)日：2022-06-02

申请号：US17398566

申请日：2021-08-10

Applicant: Samsung Display Co., LTD.

Inventor： Hyung Jun KIM ,  So Young KOO ,  Eok Su KIM ,  Yun Yong NAM ,  Jun Hyung LIM ,  Kyung Jin JEON

IPC: H01L27/12 ,  H01L29/786

Abstract: A display device according to an embodiment includes a light blocking layer disposed on a substrate; an oxygen supply layer disposed on and contacting the light blocking layer; a semiconductor layer disposed on the oxygen supply layer; and a light emitting diode electrically connected with the semiconductor layer. The semiconductor layer includes an oxide semiconductor, and the oxygen supply layer includes a metal oxide that includes at least one of indium, zinc, gallium, and tin.

公开(公告)号：US20220013608A1

公开(公告)日：2022-01-13

申请号：US17220966

申请日：2021-04-02

Applicant: Samsung Display Co., LTD.

Inventor： Hyung Jun KIM ,  So Young KOO ,  Eok Su KIM ,  Yun Yong NAM ,  Jun Hyung LIM ,  Kyung Jin JEON

IPC: H01L27/32 ,  H01L51/56

Abstract: A display device includes: a substrate; a first semiconductor layer disposed on the substrate, where the first semiconductor layer includes a channel region and a doped region; a first gate electrode disposed to overlap the channel region of the first semiconductor layer; an intermediate film disposed on the first semiconductor layer and the first gate electrode; and a first electrode disposed on the intermediate film, where an opening is defined through the intermediate film to overlap the doped region of the first semiconductor layer, the doped region of the first semiconductor layer and the first electrode contacts each other through the opening, and an area of a cross-section of the opening parallel to the substrate is in a range of about 49 μm2 to about 81 μm2.

公开(公告)号：US20240128251A1

公开(公告)日：2024-04-18

申请号：US18395966

申请日：2023-12-26

Applicant: Samsung Display Co., LTD.

Inventor： Kyung Jin JEON ,  So Young KOO ,  Eok Su KIM ,  Hyung Jun KIM ,  Yun Yong NAM ,  Jun Hyung LIM

IPC: H01L25/16 ,  H01L27/12

CPC classification number: H01L25/167 ,  H01L27/124 ,  H01L27/1259

Abstract: A display device includes a first conductive layer disposed on a substrate, a passivation layer disposed on the first conductive layer, a second conductive layer disposed on the passivation layer, a via layer disposed on the second conductive layer, a third conductive layer disposed on the via layer, the third conductive layer including a first electrode, a second electrode, a connection pattern, the first electrode, the second electrode, and the connection pattern being spaced apart from each other, and a light emitting element, a first end and a second end of the light emitting element being disposed on the first electrode and the second electrode, respectively, wherein the connection pattern electrically connects the first conductive layer and the second conductive layer through a first contact hole penetrating the via layer and the passivation layer.

公开(公告)号：US20230189585A1

公开(公告)日：2023-06-15

申请号：US17943133

申请日：2022-09-12

Applicant: Samsung Display Co., Ltd.

Inventor： Yun Yong NAM ,  So Young KOO ,  Eok Su KIM ,  Hyung Jun KIM ,  Jun Hyung LIM ,  Kyung Jin JEON

IPC: H01L27/32 ,  H01L51/56 ,  H01L51/52

CPC classification number: H01L27/3276 ,  H01L51/56 ,  H01L51/5253 ,  H01L51/524 ,  H01L27/3246 ,  H01L27/3272

Abstract: The present disclosure relates to a display panel and a method for fabricating the same. According to an embodiment, a method for fabricating a display panel, comprises disposing a circuit array and connection lines on the support substrate, the circuit array disposed in the display area, the connection lines disposed in a non-display area; disposing a via layer on the support substrate; providing a sealing hole surrounding the display area by patterning the via layer; disposing a sealing member surrounding the display area on an encapsulation substrate. In the disposing of the circuit array and the connection lines comprises disposing an active layer overlapping a light shielding member and disposing an etch stopper corresponding to at least a portion of an overlapping area between the sealing hole and the first connecting line part, by patterning a semiconductor material layer on the buffer layer.