公开(公告)号：US20240304727A1

公开(公告)日：2024-09-12

申请号：US18525551

申请日：2023-11-30

Applicant: Samsung Display Co., Ltd.

Inventor： Eunhyun Kim ,  Jongbeom Ko ,  Yeonhong Kim ,  Yeonkeon Moon ,  Sunhee Lee ,  Junghoon Lee

IPC: H01L29/786 ,  H01L29/423 ,  H01L29/66 ,  H10K59/12 ,  H10K59/121

CPC classification number: H01L29/7869 ,  H01L29/42384 ,  H01L29/66742 ,  H10K59/1201 ,  H10K59/1213

Abstract: A method of fabricating a display apparatus includes providing a substrate having a first thin film transistor region and a second thin film transistor region; forming a first oxide semiconductor layer on the substrate; forming a first gate insulating layer covering the first oxide semiconductor layer; forming a second oxide semiconductor layer on the substrate; forming a second gate insulating layer on the substrate; forming a first gate electrode in the first thin film transistor region and forming a second gate electrode in the second thin film transistor region, over the second gate insulating layer; and forming a first gate electrode stack and a second gate electrode stack by etching the first gate insulating layer and etching the second gate insulating layer by using the first gate electrode and the second gate electrode as etching masks.

公开(公告)号：US20170110528A1

公开(公告)日：2017-04-20

申请号：US15199469

申请日：2016-06-30

Applicant: Samsung Display Co., Ltd.,

Inventor： Eunhyun Kim ,  Taeyoung Kim ,  Hyehyang Park ,  Shinhyuk Yang

IPC: H01L27/32 ,  H01L29/423 ,  H01L27/12 ,  H01L29/786

CPC classification number: H01L27/3262 ,  H01L27/1225 ,  H01L27/124 ,  H01L29/42384 ,  H01L29/78633 ,  H01L29/78648 ,  H01L29/7869 ,  H01L29/78696

Abstract: A thin film transistor substrate that includes a substrate, a lower gate electrode arranged on the substrate, a semiconductor layer arranged on the substrate and overlapping the lower gate electrode, the semiconductor layer including a channel region interposed between a source region and a drain region, and an upper gate electrode arranged on the substrate and overlapping the semiconductor layer, the upper gate electrode being arranged on an opposite side of the semiconductor layer than the lower gate electrode, wherein at least one of the lower gate electrode and the upper gate electrode is perforated by an aperture to reduce a parasitic capacitance between the upper and lower gate electrodes.

公开(公告)号：US11551611B2

公开(公告)日：2023-01-10

申请号：US17413617

申请日：2018-12-18

Applicant: Samsung Display Co., Ltd.

Inventor： Sunhee Lee ,  Seryeong Kim ,  Eunhye Ko ,  Eoksu Kim ,  Eunhyun Kim

IPC: G09G3/3233 ,  G09G3/3266 ,  G09G3/3275

Abstract: A pixel circuit includes an organic light emitting element, a switching transistor configured to be turned on or off in response to a scan signal, a storage capacitor configured to store a data signal applied through a data line when the switching transistor is turned on, a driving transistor configured to allow a driving current corresponding to the data signal stored in the storage capacitor to flow into the organic light emitting element, and an emission control transistor implemented by an oxide thin film transistor, connected in series to the organic light emitting element and the driving transistor between a high power voltage and a low power voltage, and configured to be turned on or off in response to an emission control signal. The pixel circuit performs a back-biasing operation that compensates for a change in a threshold voltage of the emission control transistor by applying a back-biasing voltage to the emission control transistor.

公开(公告)号：US10763281B2

公开(公告)日：2020-09-01

申请号：US15654005

申请日：2017-07-19

Applicant: Samsung Display Co., Ltd.

Inventor： Sunhee Lee ,  Seryeong Kim ,  Eunhyun Kim

IPC: H01L27/12 ,  H01L27/32

Abstract: A semiconductor device includes a base substrate, a first thin film transistor disposed on the base substrate, a second thin film transistor disposed on the base substrate, and a plurality of insulating layers disposed on the base substrate. The first thin film transistor includes a first input electrode, a first output electrode, a first control electrode, and a first oxide semiconductor pattern, which are disposed on the base substrate. The second thin film transistor includes a second input electrode, a second output electrode, a second control electrode, and a second oxide semiconductor pattern, which are disposed on the base substrate. The first oxide semiconductor pattern includes a crystalline oxide semiconductor, and the second oxide semiconductor pattern includes an oxide semiconductor having a crystal structure different from a crystal structure of the first oxide semiconductor pattern.

公开(公告)号：US11751441B2

公开(公告)日：2023-09-05

申请号：US17332698

申请日：2021-05-27

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Eunhyun Kim ,  Eunhye Ko ,  Yeonhong Kim ,  Kyoungwon Lee ,  Sunhee Lee ,  Junhyung Lim

IPC: H10K59/126 ,  H10K59/131 ,  H10K77/10 ,  H10K102/00

CPC classification number: H10K59/126 ,  H10K59/131 ,  H10K77/111 ,  H10K2102/311

Abstract: A display apparatus in which an area of a peripheral area may be reduced while having a simple structure, the display apparatus includes a substrate, a bottom metal layer on the substrate and including a first extension line extending from the peripheral area outside a display area into the display area, a semiconductor layer on the bottom metal layer, a gate layer on the semiconductor layer, a first metal layer on the gate layer, and a second metal layer on the first metal layer and including a first data line extending from the peripheral area into the display area and electrically coupled to the first extension line in the peripheral area.

公开(公告)号：US10950678B2

公开(公告)日：2021-03-16

申请号：US15199469

申请日：2016-06-30

Applicant: Samsung Display Co., Ltd.

Inventor： Eunhyun Kim ,  Taeyoung Kim ,  Hyehyang Park ,  Shinhyuk Yang

IPC: H01L27/32 ,  H01L29/786 ,  H01L27/12 ,  H01L29/423

Abstract: A thin film transistor substrate that includes a substrate, a lower gate electrode arranged on the substrate, a semiconductor layer arranged on the substrate and overlapping the lower gate electrode, the semiconductor layer including a channel region interposed between a source region and a drain region, and an upper gate electrode arranged on the substrate and overlapping the semiconductor layer, the upper gate electrode being arranged on an opposite side of the semiconductor layer than the lower gate electrode, wherein at least one of the lower gate electrode and the upper gate electrode is perforated by an aperture to reduce a parasitic capacitance between the upper and lower gate electrodes.

公开(公告)号：US12284883B2

公开(公告)日：2025-04-22

申请号：US18460345

申请日：2023-09-01

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Eunhyun Kim ,  Eunhye Ko ,  Yeonhong Kim ,  Kyoungwon Lee ,  Sunhee Lee ,  Junhyung Lim

IPC: H10K59/126 ,  H10K59/131 ,  H10K77/10 ,  H10K102/00

Abstract: A display apparatus in which an area of a peripheral area may be reduced while having a simple structure, the display apparatus includes a substrate, a bottom metal layer on the substrate and including a first extension line extending from the peripheral area outside a display area into the display area, a semiconductor layer on the bottom metal layer, a gate layer on the semiconductor layer, a first metal layer on the gate layer, and a second metal layer on the first metal layer and including a first data line extending from the peripheral area into the display area and electrically coupled to the first extension line in the peripheral area.

公开(公告)号：US20240321895A1

公开(公告)日：2024-09-26

申请号：US18528823

申请日：2023-12-05

Applicant: Samsung Display Co., Ltd.

Inventor： Yeonhong Kim ,  Jongbeom Ko ,  Eunhyun Kim ,  Junghoon Lee ,  Sunhee Lee

IPC: H01L27/12

CPC classification number: H01L27/1218 ,  H01L27/1237 ,  H10K59/1201 ,  H10K59/1213 ,  H10K2102/351

Abstract: A display device includes a substrate, a first oxide semiconductor layer on the substrate, a first gate insulating layer on the substrate and covering an upper surface of the first oxide semiconductor layer, a second oxide semiconductor layer on the first gate insulating layer, and a second gate insulating layer covering an upper surface of the second oxide semiconductor layer. The first oxide semiconductor layer includes a channel region between a source region and a drain region The second oxide semiconductor layer includes a channel region between a source region and a drain region. A difference between a thickness of the first gate insulating layer and a thickness of the second gate insulating layer is 500 Å or less.

公开(公告)号：US20240260315A1

公开(公告)日：2024-08-01

申请号：US18373094

申请日：2023-09-26

Applicant: Samsung Display Co., Ltd.

Inventor： Yeonhong Kim ,  Jongbeom Ko ,  Eunhyun Kim ,  Yeonkeon Moon ,  Sunhee Lee ,  Junghoon Lee

IPC: H10K59/121 ,  H10K59/12

CPC classification number: H10K59/1213 ,  H10K59/1201

Abstract: A display apparatus includes a substrate including a display area and a peripheral area outside the display area, a pixel circuit disposed in the display area and including a driving thin-film transistor and a switching thin-film transistor, wherein the driving thin-film transistor includes a driving semiconductor layer, and the switching thin-film transistor includes a switching semiconductor layer, a display element connected to the pixel circuit, and a built-in driving circuit portion disposed in the peripheral area and including a first peripheral thin-film transistor including a first peripheral semiconductor layer, wherein the driving semiconductor layer and the switching semiconductor layer include a same material and each have a mobility less than a mobility of the first peripheral semiconductor layer.

公开(公告)号：US20220140042A1

公开(公告)日：2022-05-05

申请号：US17332698

申请日：2021-05-27

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Eunhyun Kim ,  Eunhye Ko ,  Yeonhong Kim ,  Kyoungwon Lee ,  Sunhee Lee ,  Junhyung Lim

IPC: H01L27/32

Abstract: A display apparatus in which an area of a peripheral area may be reduced while having a simple structure, the display apparatus includes a substrate, a bottom metal layer on the substrate and including a first extension line extending from the peripheral area outside a display area into the display area, a semiconductor layer on the bottom metal layer, a gate layer on the semiconductor layer, a first metal layer on the gate layer, and a second metal layer on the first metal layer and including a first data line extending from the peripheral area into the display area and electrically coupled to the first extension line in the peripheral area.