公开(公告)号：US20240429168A1

公开(公告)日：2024-12-26

申请号：US18597387

申请日：2024-03-06

Applicant: Samsung Electronics Co., LTD.

Inventor： Dalhee LEE ,  Sangjung JEON

IPC: H01L23/528 ,  H01L23/522 ,  H01L27/092 ,  H01L29/06 ,  H01L29/417 ,  H01L29/423 ,  H01L29/775 ,  H01L29/78 ,  H01L29/786

Abstract: An integrated circuit includes a plurality of standard cells on a front surface of a substrate and a backside wiring layer on a back surface of the substrate, where the plurality of standard cells include a first standard cell, the first standard cell includes a first P-type transistor and a first N-type transistor, the backside wiring layer includes a first backside wiring pattern configured to receive a first power supply voltage, a second backside wiring pattern configured to receive a second power supply voltage, and a third backside wiring pattern configured to receive a ground voltage, and the first standard cell at least partially overlaps the first backside wiring pattern, the second backside wiring pattern, and the third backside wiring pattern.

公开(公告)号：US20200035281A1

公开(公告)日：2020-01-30

申请号：US16401236

申请日：2019-05-02

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Chankyung KIM ,  Taehyun KIM ,  Seongui SEO ,  Sangjung JEON

IPC: G11C11/16

Abstract: A memory device including: a memory cell array including a memory cell, the memory cell configured to store first data based on a first write current; a write driver configured to output the first write current based on a control value; and a current controller including a replica memory cell, the current controller configured to generate the control value based on a state of second data which is stored in the replica memory cell, wherein an intensity of the first write current is adjusted based on the control value.