公开(公告)号：US08705219B2

公开(公告)日：2014-04-22

申请号：US13744424

申请日：2013-01-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： Chan Hee Jeon ,  Doo Hyung Kim ,  Han Gu Kim ,  Woo Jin Seo ,  Ki Tae Lee ,  Hong Wook Lim

IPC: H02H3/22

CPC classification number: H02H9/044 ,  H02H9/046

Abstract: An electrostatic discharge (ESD) protection circuit includes a first power line; a second power line; a ground line; two stack transistors connected in series between the first power line and the ground line; a first resistor connected between the first power line and a first node; a first transistor and a capacitor connected in series between the first node and the ground line; a second transistor connected between the second power line and a second node; a third transistor connected between the first power line and a third node; an inverter, connected between the third node and the ground line, and having an input connected to the second node; a fourth transistor, connected to the first power line, and having a gate connected to the second node; and a fifth transistor, connected between the second power line and the third node, and having a gate connected to a terminal of the fourth transistor.

Abstract translation: 静电放电（ESD）保护电路包括第一电源线; 第二条电力线 地线 串联连接在第一电源线和地线之间的两个堆叠晶体管; 连接在第一电力线和第一节点之间的第一电阻器; 在第一节点和地线之间串联连接的第一晶体管和电容器; 连接在第二电源线和第二节点之间的第二晶体管; 连接在所述第一电力线和第三节点之间的第三晶体管; 连接在第三节点和接地线之间并具有连接到第二节点的输入的逆变器; 第四晶体管，连接到第一电力线，并且具有连接到第二节点的栅极; 以及第五晶体管，连接在第二电源线和第三节点之间，并且具有连接到第四晶体管的端子的栅极。

公开(公告)号：US20130182359A1

公开(公告)日：2013-07-18

申请号：US13744424

申请日：2013-01-18

Applicant: Samsung Electronics Co., LTD.

Inventor： Chan Hee Jeon ,  Doo Hyung KIM ,  Han Gu Kim ,  Woo Jin Seo ,  Ki Tae Lee ,  Hong Wook Lim

IPC: H02H9/04

CPC classification number: H02H9/044 ,  H02H9/046

Abstract: An electrostatic discharge (ESD) protection circuit includes a first power line; a second power line; a ground line; two stack transistors connected in series between the first power line and the ground line; a first resistor connected between the first power line and a first node; a first transistor and a capacitor connected in series between the first node and the ground line; a second transistor connected between the second power line and a second node; a third transistor connected between the first power line and a third node; an inverter, connected between the third node and the ground line, and having an input connected to the second node; a fourth transistor, connected to the first power line, and having a gate connected to the second node; and a fifth transistor, connected between the second power line and the third node, and having a gate connected to a terminal of the fourth transistor.

Abstract translation: 静电放电（ESD）保护电路包括第一电源线; 第二条电力线; 地线 串联连接在第一电源线和地线之间的两个堆叠晶体管; 连接在第一电力线和第一节点之间的第一电阻器; 在第一节点和地线之间串联连接的第一晶体管和电容器; 连接在第二电源线和第二节点之间的第二晶体管; 连接在所述第一电力线和第三节点之间的第三晶体管; 连接在第三节点和接地线之间并具有连接到第二节点的输入的逆变器; 第四晶体管，连接到第一电力线，并且具有连接到第二节点的栅极; 以及第五晶体管，连接在第二电源线和第三节点之间，并且具有连接到第四晶体管的端子的栅极。