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公开(公告)号：US20200067846A1
公开(公告)日：2020-02-27
申请号：US16666451
申请日：2019-10-29
Applicant: Samsung Electronics Co., Ltd.
Inventor： Ashutosh Deepak GORE , Sujit JOS , Jinesh P. NAIR , Chang Soon PARK , Kiran BYNAM , Young Jun HONG
IPC: H04L12/801 , H04L12/741
Abstract: A method to detect a packet includes: receiving an input sequence including preambles; detecting a transition from a noise period to a signal period in the input sequence; dynamically adjusting a gain of the input sequence in response to the signal period being initiated; and distinguishing an intended packet from other packets, among packets received in the preambles.
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Patent Agency Ranking
公开(公告)号：US20170230145A1
公开(公告)日：2017-08-10
申请号：US15424023
申请日：2017-02-03
Applicant: Samsung Electronics Co., Ltd.
Inventor： Ashutosh Deepak GORE , Sujit JOS , Jinesh P. NAIR , Chang Soon PARK , Kiran BYNAM , Young Jun HONG
CPC classification number: H04W52/0229 , H04W52/0225 , H04W52/0238 , H04W52/0245
Abstract: Disclosed is a method and apparatus to detect an intended packet by a sliding intermediate frequency (SIF) coherent ultra low power (ULP) wireless receiver. The method includes detecting a transition from a noise period to a signal period in a pair of input sequences received, dynamically adjusting a gain of the pair of input sequences in response to the signal period being initiated, distinguishing an intended packet from packets received in preambles included in the pair of input sequences, and compensating for a carrier frequency offset of the intended packet in the signal period.
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公开(公告)号：US20160241212A1
公开(公告)日：2016-08-18
申请号：US15044398
申请日：2016-02-16
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Ashutosh Deepak GORE , Jinesh P. NAIR , Chang Soon PARK , Kiran BYNAM , Seok Ju YUN , Young Jun HONG
CPC classification number: H04B1/16 , H03F3/24 , H03G3/00 , H03G3/3036 , H03G3/3068 , H03G3/3078 , H04B2001/0408
Abstract: Examples provide a method of performing automatic gain control (AGC) in a wireless receiver, the method including computing, by an energy detection (ED) circuit, a variance in an output signal of an analog-to-digital converter (ADC), and activating, by the ED circuit, an AGC circuit to adjust a gain of at least one component in a radio frequency integrated chip (RFIC) in response to the variance exceeding a threshold. Examples also provide for a wireless receiver that implements such a method.
Abstract translation: 示例提供了一种在无线接收机中执行自动增益控制（AGC）的方法，该方法包括通过能量检测（ED）电路计算模数转换器（ADC）的输出信号的方差，以及 通过ED电路激活AGC电路，以响应于超过阈值的方差来调整射频集成芯片（RFIC）中的至少一个分量的增益。 实例还提供了实现这种方法的无线接收机。
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公开(公告)号：US20170324602A1
公开(公告)日：2017-11-09
申请号：US15487937
申请日：2017-04-14
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Sujit JOS , Kiran BYNAM , Jinesh P NAIR , Ashutosh Deepak GORE , Chandrashekhar Thejaswi PS , Chang Soon PARK , Young Jun HONG , Youngsoo KIM
CPC classification number: H04L27/2657 , H04L25/022 , H04L27/0014 , H04L2027/0026 , H04L2027/003
Abstract: A method to compensate a carrier frequency offset (CFO) in a receiver is disclosed. The method includes receiving discrete time samples, obtaining a sample vector from the received discrete time samples, obtaining tentative CFO estimates based on the sample vector, selecting a CFO having a greatest compensation coefficient from the tentative CFO estimates, and compensating the CFO in the received discrete time samples.
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公开(公告)号：US20170214628A1
公开(公告)日：2017-07-27
申请号：US15412999
申请日：2017-01-23
Applicant: Samsung Electronics Co., Ltd.
Inventor： Ashutosh Deepak GORE , Sujit JOS , Jinesh P. NAIR , Chang Soon PARK , Kiran BYNAM , Young Jun HONG
IPC: H04L12/801 , H04L12/741
Abstract: A method to detect a packet includes: receiving an input sequence including preambles; detecting a transition from a noise period to a signal period in the input sequence; dynamically adjusting a gain of the input sequence in response to the signal period being initiated; and distinguishing an intended packet from other packets, among packets received in the preambles.
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公开(公告)号：US20160359613A1
公开(公告)日：2016-12-08
申请号：US15172487
申请日：2016-06-03
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Sujit JOS , Kiran BYNAM , Ashutosh Deepak GORE , Chandrashekhar Thejaswi PS , Chang Soon PARK , Young Jun HONG , Manoj CHOUDHARY
CPC classification number: H04L7/02 , H04L7/0054 , H04W56/001
Abstract: A method for compensating for a sampling clock-offset includes calculating a positive threshold and a negative threshold of pulse-shaped data symbols to be received, calculating a positive sum ratio and a negative sum ratio from received samples, and compensating for a sampling clock-offset in response to the positive sum ratio being less than or equal to the positive threshold and the negative sum ratio being less than or equal to the negative threshold.
Abstract translation: 用于补偿采样时钟偏移的方法包括计算要接收的脉冲数据符号的正阈值和负阈值，从接收样本计算正和比和负和比，并补偿采样时钟 - 响应于正和比小于或等于正阈值并且负和比小于或等于负阈值的偏移。
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