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公开(公告)号:US20210028100A1
公开(公告)日:2021-01-28
申请号:US16863257
申请日:2020-04-30
Applicant: Samsung Electronics Co., Ltd.
Inventor: Junso PAK , Seungki NAM , Jiyoung PARK , Bo PU
IPC: H01L23/498 , H01L23/00 , H01L23/31 , H01L21/48 , H01L21/56
Abstract: A stack package may include a first substrate package, a second substrate package, an interposer and at least one semiconductor chip. The first substrate package may include a plurality of first pads isolated from direct contact with each other by a first pitch. The second substrate package may be under the first substrate package. The second substrate package may include a plurality of second pads isolated from direct contact with each other by a second pitch. The second pitch may be different from the first pitch. The interposer may be above the first substrate package. The interposer may include a plurality of third pads isolated from direct contact with each other by a third pitch. The semiconductor chip may be arranged above the interposer.
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公开(公告)号:US20200381347A1
公开(公告)日:2020-12-03
申请号:US16692333
申请日:2019-11-22
Applicant: Samsung Electronics Co., Ltd.
Inventor: Bo PU , Jun So PAK , Sung Wook MOON
IPC: H01L23/498 , H01L23/00 , H01L25/065
Abstract: A semiconductor package may comprise: a first passivation layer forming an electrical connection with one or more first bumps; a substrate layer including a second passivation layer and a silicon layer; a back-end-of-line (BEOL) layer formed on the substrate layer; and a third passivation layer formed on the BEOL layer forming an electrical connection with one or more second bumps, wherein the substrate layer includes a first signal TSV (Through Silicon Via) which transmits a first signal between the BEOL layer and a first lower pad, a second signal TSV which transmits a second signal between the BEOL layer and a second lower pad, and a ground TSV which is disposed between the first signal TSV and the second signal TSV and formed so that one end thereof is connected to the BEOL layer and the other end thereof floats.
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