公开(公告)号：US20200381347A1

公开(公告)日：2020-12-03

申请号：US16692333

申请日：2019-11-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Bo PU ,  Jun So PAK ,  Sung Wook MOON

IPC: H01L23/498 ,  H01L23/00 ,  H01L25/065

Abstract: A semiconductor package may comprise: a first passivation layer forming an electrical connection with one or more first bumps; a substrate layer including a second passivation layer and a silicon layer; a back-end-of-line (BEOL) layer formed on the substrate layer; and a third passivation layer formed on the BEOL layer forming an electrical connection with one or more second bumps, wherein the substrate layer includes a first signal TSV (Through Silicon Via) which transmits a first signal between the BEOL layer and a first lower pad, a second signal TSV which transmits a second signal between the BEOL layer and a second lower pad, and a ground TSV which is disposed between the first signal TSV and the second signal TSV and formed so that one end thereof is connected to the BEOL layer and the other end thereof floats.