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公开(公告)号:US20190102197A1
公开(公告)日:2019-04-04
申请号:US15853628
申请日:2017-12-22
Applicant: Samsung Electronics Co., Ltd.
Inventor: Aditya KUMAR , Sandeep GUPTA , Bonnie Collett SEXTON
Abstract: According to one general aspect, an apparatus may include a decoder circuit, a scheduler circuit, and an execution circuit. The decoder circuit may be configured to detect, within an instruction stream, a first instruction followed by a second instruction, wherein the first instruction takes as input a dividend and a divisor, and wherein the second instruction produces a remainder. The scheduler circuit may be configured to: merge the first and second instructions into a third instruction, wherein the third instruction takes as input the dividend and the divisor, and produces the remainder, replace, within an instruction pipeline, the first instruction with the third instruction, and delete, within the instruction pipeline, the second instruction. The execution circuit may be configured to execute the third instruction.
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公开(公告)号:US20180121167A1
公开(公告)日:2018-05-03
申请号:US15419757
申请日:2017-01-30
Applicant: Samsung Electronics Co., Ltd.
Inventor: Bonnie Collett SEXTON , James T. LONGINO
CPC classification number: G06F7/552 , G06F7/4824 , G06F7/49 , G06F7/535 , G06F17/17 , G06F2207/48 , G06F2207/552
Abstract: Apparatuses and methods of manufacturing same, systems, and methods for generating a starting estimate for radix-16 square root iterative calculation using hardware, including a radix-4 partial remainder-divisor (PD) table, which is used for both division and square root operations, are described. In one aspect, a part of a radicand for a radix-16 square root iterative operation is used to determine column/root and row/partial radicand values, which are then used to determine a starting estimate from a radix-4 PD table for the radix-16 square root iterative operation.
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公开(公告)号:US20180121164A1
公开(公告)日:2018-05-03
申请号:US15431323
申请日:2017-02-13
Applicant: Samsung Electronics Co., Ltd.
Inventor: Bonnie Collett SEXTON , James T. LONGINO
CPC classification number: G06F7/552 , G06F7/4824 , G06F7/49 , G06F7/535 , G06F17/17 , G06F2207/48 , G06F2207/552
Abstract: Apparatuses and methods of manufacturing same, systems, and methods for performing recursive operations using a partial remainder-divisor (PD) table are described. In one aspect, it is determined whether a current cell in the PD table indicated by a current partial remainder/radicand row value and a current divisor/root column value is outside a primary region of the PD table. If the current cell is outside the primary region of the PD table, at least one of the current partial remainder/radicand row value and the current divisor/root column value are adjusted so that the indicated current cell falls within the primary region of the PD table.
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