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公开(公告)号:US20170162566A1
公开(公告)日:2017-06-08
申请号:US15219374
申请日:2016-07-26
发明人: Kyu Baik CHANG , Byoung Hak HONG , Yoon Suk KIM , Seung Hyun SONG
IPC分类号: H01L27/088 , H01L29/78 , H01L27/092
CPC分类号: H01L27/0886 , H01L21/823807 , H01L21/823821 , H01L21/82385 , H01L27/0924 , H01L29/7843 , H01L29/7845
摘要: A semiconductor device includes first and second fins on first and second regions of a substrate, a first trench overlapping a vertical end portion of the first fin and including first upper and lower portions, the first upper and lower portions separated by an upper surface of the first fin, a second trench overlapping a vertical end portion of the second fin and including second upper and lower portions separated by an upper surface of the second fin, a first dummy gate electrode including first metal oxide and filling layers, the first metal oxide layer filling the first lower portion of the first trench and is along a sidewall of the first upper portion of the first trench, and a second dummy gate electrode filling the second trench and including second metal oxide and filling layers, the second metal oxide layer extending along sidewalls of the second trench.
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公开(公告)号:US20170033107A1
公开(公告)日:2017-02-02
申请号:US15159978
申请日:2016-05-20
发明人: Byoung Hak HONG , Sungil Park , Toshinori Fukai , Shigenobu Maeda , Sada-aki Masuoka , Sanghyun Lee , Keon Yong Cheon , Hock-Chun Chin
IPC分类号: H01L27/092 , H01L21/265 , H01L21/8234 , H01L21/02 , H01L29/06 , H01L29/78
CPC分类号: H01L27/0924 , H01L21/02532 , H01L21/02636 , H01L21/26513 , H01L21/823412 , H01L21/823437 , H01L21/823807 , H01L21/823821 , H01L21/823828 , H01L27/092 , H01L29/0649 , H01L29/78 , H01L29/7846 , H01L29/7848
摘要: A semiconductor device includes a substrate including at least one metal-oxide-semiconductor field-effect transistor (MOSFET) region defined by a device isolation layer and having an active pattern extending in a first direction on the MOSFET region, a gate electrode intersecting the active pattern on the substrate and extending in a second direction intersecting the first direction, and a first gate separation pattern adjacent to the MOSFET region when viewed from a plan view and dividing the gate electrode into segments spaced apart from each other in the second direction. The first gate separation pattern has a tensile strain when the MOSFET region is a P-channel. MOSFET (PMOSFET) region. The first gate separation pattern has a compressive strain when the MOSFET region is an N-channel MOSFET (NMOSFET) region.
摘要翻译: 半导体器件包括:衬底,其包括由器件隔离层限定的至少一个金属氧化物半导体场效应晶体管(MOSFET)区域,并且具有在MOSFET区域上沿第一方向延伸的有源图案;栅极电极与有源 并且沿与第一方向相交的第二方向延伸,以及从平面图观察与MOSFET区域相邻的第一栅极分离图案,并且将栅电极在第二方向上彼此间隔开。 当MOSFET区域为P沟道时,第一栅极分离图案具有拉伸应变。 MOSFET(PMOSFET)区域。 当MOSFET区域是N沟道MOSFET(NMOSFET)区域时,第一栅极分离图案具有压缩应变。
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