公开(公告)号：US20250081468A1

公开(公告)日：2025-03-06

申请号：US18821055

申请日：2024-08-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Chang Min CHOI ,  Chang Heon LEE ,  Ju Seong MIN ,  Taek Kyu YOON

IPC: H10B43/40 ,  G11C5/06 ,  G11C16/04 ,  H10B43/10 ,  H10B43/27 ,  H10B43/35

Abstract: Provided a semiconductor memory device. The semiconductor memory device comprises a cell structure, and a peripheral circuit structure electrically connected to the cell structure. The cell structure includes a plurality of gate electrodes stacked in a vertical direction and spaced apart from each other in the vertical direction, a channel structure penetrating the plurality of gate electrodes in the vertical direction, and a bit-line connected to the channel structure. The peripheral circuit structure includes an active area, a gate structure on the active area, the gate structure intersecting the active area, a source/drain area on at least one side of the gate structure and in the active area, an insulating spacer covering the gate structure, a conductive spacer on a sidewall of the insulating spacer and electrically connected to the source/drain area, and a contact electrically connected to the conductive spacer. At least a portion of a topmost surface of the insulating spacer is coplanar with at least a portion of a topmost surface of the conductive spacer.