Abstract:
Memory management includes maintaining a first mapping structure for each thread of a multi-threaded process. A second mapping structure is maintained for each core of a multi-core processing device. A global mapping structure for shared memory mappings is maintained. During thread context switches, copying thread context entries without modifying a page-mapping base address register of each core of the multi-core processing device.
Abstract:
One embodiment provides a caching system comprising a hash table, a network interface for receiving a sequence of network-level packets for caching, and a caching application module for storing the sequence of network-level packets in the hash table. The sequence of network-level packets is stored its original form without de-fragmentation.
Abstract:
An architecture for multi-core and many-core processor systems includes a set of resource managers having a hierarchy of at least one level. The resource managers act as trusted proxies for the operating system (OS) kernel to manage resources for applications. The application may include a trusted secure specification defining resource and access privileges of the associated application.
Abstract:
One embodiment provides a caching system comprising a hash table, a network interface for receiving a sequence of network-level packets for caching, and a caching application module for storing the sequence of network-level packets in the hash table. The sequence of network-level packets is stored its original form without de-fragmentation.
Abstract:
Memory management includes maintaining a first mapping structure for each thread of a multi-threaded process. A second mapping structure is maintained for each core of a multi-core processing device. A global mapping structure for shared memory mappings is maintained. During thread context switches, copying thread context entries without modifying a page-mapping base address register of each core of the multi-core processing device.